| Algebric decision diagrams and their applications RI Bahar, EA Frohm, CM Gaona, GD Hachtel, E Macii, A Pardo, ... Formal methods in system design 10, 171-206, 1997 | 1178 | 1997 |
| DRUM: A dynamic range unbiased multiplier for approximate applications S Hashemi, RI Bahar, S Reda 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 418-425, 2015 | 400 | 2015 |
| Power and energy reduction via pipeline balancing RI Bahar, S Manne ACM SIGARCH Computer Architecture News 29 (2), 218-229, 2001 | 287 | 2001 |
| ABACUS: A technique for automated behavioral synthesis of approximate computing circuits K Nepal, Y Li, RI Bahar, S Reda 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 229 | 2014 |
| Power and performance tradeoffs using various caching strategies RI Bahar, G Albera, S Manne Proceedings of the 1998 international symposium on Low power electronics and …, 1998 | 173 | 1998 |
| Understanding the impact of precision quantization on the accuracy and energy of neural networks S Hashemi, N Anthony, H Tann, RI Bahar, S Reda Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 165 | 2017 |
| A probabilistic-based design methodology for nanoscale computation RI Bahar, J Mundy, J Chen ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003 | 153 | 2003 |
| Ensuring write ordering under writeback cache error conditions RL Stamm, RI Bahar, RL Strouble, ND Wade, JH Edmondson US Patent 5,347,648, 1994 | 139 | 1994 |
| Error transition mode for multi-processor system RL Stamm, RI Bahar, M Callander, L Chao, DR Meyer, D Sanders, ... US Patent 5,155,843, 1992 | 127 | 1992 |
| Architectures for silicon nanoelectronics and beyond RI Bahar, D Hammerstrom, J Harlow, WH Joyner, C Lau, D Marculescu, ... Computer 40 (1), 25-33, 2007 | 113 | 2007 |
| Designing logic circuits for probabilistic computation in the presence of noise K Nepal, RI Bahar, J Mundy, WR Patterson, A Zaslavsky Proceedings of the 42nd Annual Design Automation Conference, 485-490, 2005 | 111 | 2005 |
| Runtime configurable deep neural networks for energy-accuracy trade-off H Tann, S Hashemi, RI Bahar, S Reda Proceedings of the eleventh ieee/acm/ifip international conference on …, 2016 | 92 | 2016 |
| Nano, quantum and molecular computing SK Shukla, RI Bahar Kluwer Academic, 2004 | 85 | 2004 |
| Processor and method for delaying the processing of cache coherency transactions during outstanding cache fills RL Stamm, RI Bahar, ND Wade US Patent 5,404,483, 1995 | 85 | 1995 |
| Hardware-software codesign of accurate, multiplier-free deep neural networks H Tann, S Hashemi, RI Bahar, S Reda Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017 | 83 | 2017 |
| Dynamically reconfiguring processor resources to reduce power consumption in high-performance processors R Maro, Y Bai, RI Bahar Power-Aware Computer Systems: First International Workshop, PACS 2000 …, 2001 | 81 | 2001 |
| Automated high-level generation of low-power approximate computing circuits K Nepal, S Hashemi, H Tann, RI Bahar, S Reda IEEE Transactions on Emerging Topics in Computing 7 (1), 18-30, 2016 | 73 | 2016 |
| A low-power dynamic divider for approximate applications S Hashemi, RI Bahar, S Reda Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 71 | 2016 |
| Embedded-TM: Energy and complexity-effective hardware transactional memory for embedded multicore systems C Ferri, S Wood, T Moreshet, RI Bahar, M Herlihy Journal of Parallel and Distributed Computing 70 (10), 1042-1052, 2010 | 58 | 2010 |
| Parametric yield management for 3D ICs: Models and strategies for improvement C Ferri, S Reda, RI Bahar ACM Journal on Emerging Technologies in Computing Systems (JETC) 4 (4), 1-22, 2008 | 58 | 2008 |
