| Full chip leakage estimation considering power supply and temperature variations H Su, F Liu, A Devgan, E Acar, S Nassif Proceedings of the 2003 international symposium on Low power electronics and …, 2003 | 353 | 2003 |
| Optimal shielding/spacing metrics for low power design R Arunachalam, E Acar, SR Nassif IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings., 167-172, 2003 | 116 | 2003 |
| h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response T Lin, E Acar, L Pileggi Proceedings of the 1998 IEEE/ACM international conference on Computer-aided …, 1998 | 116 | 1998 |
| Power grid reduction based on algebraic multigrid principles H Su, E Acar, SR Nassif Proceedings of the 40th annual Design Automation Conference, 109-112, 2003 | 93 | 2003 |
| Association between the gensini score and carotid artery stenosis A Avci, S Fidan, MM Tabakçı, C Toprak, E Alizade, E Acar, E Bayam, ... Korean circulation journal 46 (5), 639-645, 2016 | 73 | 2016 |
| Virtual probe: A statistical framework for low-cost silicon characterization of nanoscale integrated circuits W Zhang, X Li, F Liu, E Acar, RA Rutenbar, RD Blanton IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011 | 72 | 2011 |
| Method for determining and using leakage current sensitivities to optimize the design of an integrated circuit E Acar, A Devgan, SR Nassif US Patent 7,137,080, 2006 | 69 | 2006 |
| Abstraction and microarchitecture scaling in early-stage power modeling H Jacobson, A Buyuktosunoglu, P Bose, E Acar, R Eickemeyer 2011 IEEE 17th International Symposium on High Performance Computer …, 2011 | 65 | 2011 |
| S2P: A stable 2-pole RC delay and coupling noise metric [IC interconnects] E Acar, A Odabasioglu, M Celik, LT Pileggi Proceedings Ninth Great Lakes Symposium on VLSI, 60-63, 1999 | 60 | 1999 |
| A waveform independent gate model for accurate timing analysis P Li, E Acar 2005 International Conference on Computer Design, 363-365, 2005 | 53 | 2005 |
| Method for determining the leakage power for an integrated circuit E Acar, A Devgan, Y Liu, SR Nassif, H Su US Patent 6,842,714, 2005 | 53 | 2005 |
| Leakage and leakage sensitivity computation for combinational circuits E Acar, A Devgan, R Rao, Y Liu, H Su, S Nassif, J Burns Proceedings of the 2003 international symposium on Low power electronics and …, 2003 | 45 | 2003 |
| Parallelized Hybrid Sparse Matrix Representations for Performing Personalized Content Ranking E Acar, RR Bordawekar, MM Franceschini, LA Lastras-Montano, H Qian, ... US Patent App. 14/635,007, 2016 | 39 | 2016 |
| Concept analysis operations utilizing accelerators E Acar, RR Bordawekar, MM Franceschini, LA Lastras-Montano, R Puri, ... US Patent 10,373,057, 2019 | 38 | 2019 |
| Multi-wafer virtual probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlation W Zhang, X Li, E Acar, F Liu, R Rutenbar 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 47-54, 2010 | 36 | 2010 |
| Assessment of true worst case circuit performance under interconnect parameter variations E Acar, S Nassif, Y Liu, LT Pileggi Proceedings of the IEEE 2001. 2nd International Symposium on Quality …, 2001 | 34 | 2001 |
| Matrix ordering for cache efficiency in performing large sparse matrix operations E Acar, RR Bordawekar, MM Franceschini, LA Lastras-Montano, R Puri, ... US Patent 9,606,934, 2017 | 33 | 2017 |
| TETA: Transistor-level waveform evaluation for timing analysis E Acar, F Dartu, LT Pileggi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002 | 30 | 2002 |
| Performance modeling for early analysis of multi-core systems R Bergamaschi, I Nair, G Dittmann, H Patel, G Janssen, N Dhanwada, ... Proceedings of the 5th IEEE/ACM international conference on Hardware …, 2007 | 28 | 2007 |
| Simultaneous power and timing optimization in integrated circuits by performing discrete actions on circuit components E Acar, Q Haifeng US Patent 7,689,942, 2010 | 27 | 2010 |
