| Vertical MOSFET SRAM cell LL Hsu, O Gluschenkov, JA Mandelman, CJ Radens US Patent 7,138,685, 2006 | 366 | 2006 |
| High acceptor level doping in silicon germanium MA Ebrish, O Gluschenkov, S Mochizuki, A Reznicek US Patent 9,799,736, 2017 | 327 | 2017 |
| Integrated circuit chip with FETs having mixed body thicknesses and method of manufacture thereof RV Joshi, LC Hsu, O Gluschenkov US Patent 7,968,944, 2011 | 227 | 2011 |
| Structure and method to improve channel mobility by gate electrode stress modification MP Belyansky, D Chidambarrao, OH Dokumaci, BB Doris, O Gluschenkov US Patent 6,977,194, 2005 | 218 | 2005 |
| Performance dependence of CMOS on silicon substrate orientation for ultrathin oxynitride and HfO2 gate dielectrics M Yang, EP Gusev, M Ieong, O Gluschenkov, DC Boyd, KK Chan, ... IEEE Electron Device Letters 24 (5), 339-341, 2003 | 203 | 2003 |
| Strained finFETs and method of manufacture D Chidambarrao, OH Dokumaci, OG Gluschenkov US Patent 7,198,995, 2007 | 191 | 2007 |
| Structure and method of making strained semiconductor CMOS transistors having lattice-mismatched semiconductor regions underlying source and drain regions H Chen, D Chidambarrao, OG Gluschenkov, AL Steegen, HS Yang US Patent 6,891,192, 2005 | 184 | 2005 |
| A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels R Xie, P Montanini, K Akarvardar, N Tripathi, B Haran, S Johnson, T Hook, ... 2016 IEEE international electron devices meeting (IEDM), 2.7. 1-2.7. 4, 2016 | 177 | 2016 |
| Structure and method for mobility enhanced MOSFETs with unalloyed silicide Y Liu, D Chidambarrao, O Gluschenkov, JR Holt, RT Mo, K Rim US Patent 8,217,423, 2012 | 131 | 2012 |
| Gate processing method with reduced gate oxide corner and edge thinning H Tews, O Gluschenkov, M Weybright US Patent 6,656,798, 2003 | 130 | 2003 |
| High mobility CMOS circuits BB Doris, OG Gluschenkov, H Zhu US Patent 7,015,082, 2006 | 129 | 2006 |
| Silicon device on Si: C-OI and SGOI and method of manufacture D Chidambarrao, OH Dokumaci, OG Gluschenkov US Patent 7,247,534, 2007 | 123 | 2007 |
| Logic circuits having linear and cellular gate transistors VWC Chan, HJC Wann, SF Huang, O Gluschenkov US Patent 6,975,133, 2005 | 106 | 2005 |
| Stressed semiconductor device structures having granular semiconductor material BB Doris, MP Belyansky, DC Boyd, D Chidambarrao, O Gluschenkov US Patent 7,122,849, 2006 | 104 | 2006 |
| Semiconductor device structure with active regions having different surface directions and methods BB Doris, O Gluschenkov, M Ieong, E Leobandung, H Zhu US Patent 7,354,806, 2008 | 103 | 2008 |
| Optical characteristics of p‐type GaN films grown by plasma‐assisted molecular beam epitaxy JM Myoung, KH Shim, C Kim, O Gluschenkov, K Kim, S Kim, DA Turnbull, ... Applied Physics Letters 69 (18), 2722-2724, 1996 | 101 | 1996 |
| Method of fabricating mobility enhanced CMOS devices MP Belyansky, BB Doris, O Gluschenkov US Patent 7,205,206, 2007 | 100 | 2007 |
| RTA-driven intra-die variations in stage delay, and parametric sensitivities for 65nm technology B Walsh, H Utomo, E Leobandung, A Mahorowala, D Mocuta, K Miyamoto, ... 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 170-171, 2006 | 95 | 2006 |
| Method for forming a uniform distribution of nitrogen in silicon oxynitride gate dielectric AI Chou, MP Chudzik, T Furukawa, O Gluschenkov, PD Kirsch, KC Scheer, ... US Patent 6,930,060, 2005 | 95 | 2005 |
| Structure and method to improve channel mobility by gate electrode stress modification MP Belyansky, D Chidambarrao, OH Dokumaci, BB Doris, O Gluschenkov US Patent 7,750,410, 2010 | 92 | 2010 |
