Wide-supply-range all-digital leakage variation sensor for on-chip process and temperature monitoring AKMM Islam, J Shiomi, T Ishihara, H Onodera IEEE Journal of Solid-State Circuits 50 (11), 2475-2490, 2015 | 60 | 2015 |
An optical neural network architecture based on highly parallelized WDM-multiplier-accumulator T Ishihara, J Shiomi, N Hattori, Y Masuda, A Shinya, M Notomi 2019 IEEE/ACM Workshop on Photonics-Optics Technology Oriented Networking …, 2019 | 15 | 2019 |
Fully digital on-chip memory using minimum height standard cells for near-threshold voltage computing J Shiomi, T Ishihara, H Onodera 2016 26th International Workshop on Power and Timing Modeling, Optimization …, 2016 | 15 | 2016 |
Microarchitectural-level statistical timing models for near-threshold circuit design J Shiomi, T Ishihara, H Onodera The 20th Asia and South Pacific Design Automation Conference, 87-93, 2015 | 15 | 2015 |
BDD-based synthesis of optical logic circuits exploiting wavelength division multiplexing R Matsuo, J Shiomi, T Ishihara, H Onodera, A Shinya, M Notomi Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019 | 11 | 2019 |
Real-time adaptive data filtering with multiple sensors for indoor monitoring K Akiyama, R Shinkuma, J Shiomi NOMS 2022-2022 IEEE/IFIP Network Operations and Management Symposium, 1-3, 2022 | 10 | 2022 |
An energy-efficient on-chip memory structure for variability-aware near-threshold operation J Shiomi, T Ishihara, H Onodera Sixteenth International Symposium on Quality Electronic Design, 23-28, 2015 | 10 | 2015 |
All-digital on-chip heterogeneous sensors for tracking the minimum energy point of processors S Hokimoto, J Shiomi, T Ishihara, H Onodera 2018 IEEE International Conference on Microelectronic Test Structures (ICMTS …, 2018 | 9 | 2018 |
Distrihd: A memory efficient distributed binary hyperdimensional computing architecture for image classification D Liang, J Shiomi, N Miura, H Awano 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 43-49, 2022 | 8 | 2022 |
Area-efficient fully digital memory using minimum height standard cells for near-threshold voltage computing J Shiomi, T Ishihara, H Onodera Integration 65, 201-210, 2019 | 7 | 2019 |
Minimum energy point tracking with all-digital on-chip sensors J Shiomi, S Hokimoto, T Ishihara, H Onodera Journal of Low Power Electronics 14 (2), 227-235, 2018 | 7 | 2018 |
A synthesis method for power-efficient integrated optical logic circuits towards light speed processing R Matsuo, J Shiomi, T Ishihara, H Onodera, A Shinya, M Notomi 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 488-493, 2020 | 6 | 2020 |
Analytical stability modeling for CMOS latches in low voltage operation T Kamakari, J Shiomi, T Ishihara, H Onodera IEICE Transactions on Fundamentals of Electronics, Communications and …, 2016 | 6 | 2016 |
A closed-form stability model for cross-coupled inverters operating in sub-threshold voltage region T Kamakari, J Shiomi, T Ishihara, H Onodera 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 691-696, 2016 | 6 | 2016 |
Pin accessibility evaluating model for improving routability of VLSI designs HY Su, S Nishizawa, YS Wu, J Shiomi, YL Li, H Onodera 2017 30th IEEE International System-on-Chip Conference (SOCC), 56-61, 2017 | 5 | 2017 |
A DLL-based body bias generator for minimum energy operation with independent P-well and N-well bias K Nagai, J Shiomi, H Onodera 2020 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 31-34, 2020 | 4 | 2020 |
On-chip memory optimized CNN accelerator with efficient partial-sum accumulation H Xu, J Shiomi, H Onodera Proceedings of the 2020 on Great Lakes Symposium on VLSI, 21-26, 2020 | 4 | 2020 |
Real-time minimum energy point tracking using a predetermined optimal voltage setting strategy K Kiyawat, Y Masuda, J Shiomi, T Ishihara 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 415-421, 2020 | 4 | 2020 |
An integrated optical parallel multiplier exploiting approximate binary logarithms towards light speed data processing J Shiomi, T Ishihara, H Onodera, A Shinya, M Notomi 2018 IEEE International Conference on Rebooting Computing (ICRC), 1-6, 2018 | 4 | 2018 |
Maximizing energy efficiency of on-chip caches exploiting hybrid memory structure H Xu, J Shiomi, T Ishihara, H Onodera 2018 28th International Symposium on Power and Timing Modeling, Optimization …, 2018 | 4 | 2018 |