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Riccardo Della Sala
Riccardo Della Sala
在 uniroma1.it 的电子邮件经过验证
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引用次数
引用次数
年份
A novel ultra-compact FPGA-compatible TRNG architecture exploiting latched ring oscillators
R Della Sala, D Bellizia, G Scotti
IEEE Transactions on Circuits and Systems II: Express Briefs 69 (3), 1672-1676, 2021
462021
A 0.3 V, rail-to-rail, ultralow-power, non-tailed, body-driven, sub-threshold amplifier
F Centurelli, R Della Sala, G Scotti, A Trifiletti
Applied Sciences 11 (6), 2528, 2021
302021
A lightweight FPGA compatible weak-PUF primitive based on XOR gates
R Della Sala, D Bellizia, G Scotti
IEEE Transactions on Circuits and Systems II: Express Briefs 69 (6), 2972-2976, 2022
292022
High-throughput FPGA-compatible TRNG architecture exploiting multistimuli metastable cells
R Della Sala, D Bellizia, G Scotti
IEEE Transactions on Circuits and Systems I: Regular Papers 69 (12), 4886-4897, 2022
282022
A novel ultra-compact fpga puf: The dd-puf
R Della Sala, D Bellizia, G Scotti
Cryptography 5 (3), 23, 2021
282021
A 0.3 V rail-to-rail ultra-low-power OTA with improved bandwidth and slew rate
F Centurelli, R Della Sala, P Monsurrò, G Scotti, A Trifiletti
Journal of Low Power Electronics and Applications 11 (2), 19, 2021
272021
Enabling ULV fully synthesizable analog circuits: The BA cell, a standard-cell-based building block for analog design
R Della Sala, F Centurelli, G Scotti
IEEE Transactions on Circuits and Systems II: Express Briefs 69 (12), 4689-4693, 2022
242022
A standard-cell-based CMFB for fully synthesizable OTAs
F Centurelli, R Della Sala, G Scotti
Journal of Low Power Electronics and Applications 12 (2), 27, 2022
242022
An ultra-low-voltage class-AB OTA exploiting local CMFB and body-to-gate interface
F Centurelli, R Della Sala, P Monsurro, P Tommasino, A Trifiletti
AEU-International Journal of Electronics and Communications 145, 154081, 2022
232022
A novel differential to single-ended converter for ultra-low-voltage inverter-based OTAs
R Della Sala, F Centurelli, G Scotti
IEEE Access 10, 98179-98190, 2022
222022
A tree-based architecture for high-performance ultra-low-voltage amplifiers
F Centurelli, R Della Sala, P Monsurrò, G Scotti, A Trifiletti
Journal of Low Power Electronics and Applications 12 (1), 12, 2022
222022
A novel OTA architecture exploiting current gain stages to boost bandwidth and slew-rate
F Centurelli, R Della Sala, P Monsurrò, G Scotti, A Trifiletti
Electronics 10 (14), 1638, 2021
192021
Area-efficient low-power bandpass Gm-C filter for epileptic seizure detection in 130nm CMOS
R Della Sala, P Monsurrò, G Scotti, A Trifiletti
2019 26th IEEE International Conference on Electronics, Circuits and Systems …, 2019
192019
A novel FPGA implementation of the NAND-PUF with minimal resource usage and high reliability
R Della Sala, G Scotti
Cryptography 7 (2), 18, 2023
142023
A 0.3 V rail-to-rail three-stage OTA with high DC gain and improved robustness to PVT variations
R Della Sala, F Centurelli, P Monsurrò, G Scotti, A Trifiletti
IEEE Access 11, 19635-19644, 2023
142023
A differential-to-single-ended converter based on enhanced body-driven current mirrors targeting ultra-low-voltage OTAs
R Della Sala, F Centurelli, G Scotti, P Tommasino, A Trifiletti
Electronics 11 (23), 3838, 2022
142022
Exploiting the DD-Cell as an ultra-compact entropy source for an FPGA-based re-configurable PUF-TRNG architecture
R Della Sala, G Scotti
IEEE Access, 2023
132023
Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications
R Della Sala, F Centurelli, G Scotti, G Palumbo
IEEE Access, 2024
122024
A 0.15-to-0.5 V body-driven dynamic comparator with rail-to-rail ICMR
R Della Sala, V Spinogatti, C Bocciarelli, F Centurelli, A Trifiletti
Journal of Low Power Electronics and Applications 13 (2), 35, 2023
112023
A monostable physically unclonable function based on improved RCCMs with 0–1.56% native bit instability at 0.6–1.2 V and 0–75 C
R Della Sala, D Bellizia, F Centurelli, G Scotti
Electronics 12 (3), 755, 2023
102023
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