| Device-aware test: A new test approach towards DPPB level M Fieback, L Wu, GC Medeiros, H Aziza, S Rao, EJ Marinissen, M Taouil, ... 2019 IEEE International Test Conference (ITC), 1-10, 2019 | 59 | 2019 |
| Electrical modeling of STT-MRAM defects L Wu, M Taouil, S Rao, EJ Marinissen, S Hamdioui 2018 IEEE International Test Conference (ITC), 1-10, 2018 | 45 | 2018 |
| Pinhole defect characterization and fault modeling for STT-MRAM testing L Wu, S Rao, GC Medeiros, M Taouil, EJ Marinissen, F Yasin, S Couet, ... 2019 IEEE European Test Symposium (ETS), 1-6, 2019 | 28 | 2019 |
| Defect and fault modeling framework for STT-MRAM testing L Wu, S Rao, M Taouil, GC Medeiros, M Fieback, EJ Marinissen, GS Kar, ... IEEE Transactions on Emerging Topics in Computing 9 (2), 707-723, 2019 | 25 | 2019 |
| Defects, fault modeling, and test development framework for RRAMs M Fieback, GC Medeiros, L Wu, H Aziza, R Bishnoi, M Taouil, S Hamdioui ACM Journal on Emerging Technologies in Computing Systems (JETC) 18 (3), 1-26, 2022 | 23 | 2022 |
| Survey on STT-MRAM testing: Failure mechanisms, fault models, and tests L Wu, M Taouil, S Rao, EJ Marinissen, S Hamdioui arXiv preprint arXiv:2001.05463, 2020 | 20 | 2020 |
| Impact of magnetic coupling and density on STT-MRAM performance L Wu, S Rao, M Taouil, EJ Marinissen, GS Kar, S Hamdioui 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020 | 16 | 2020 |
| Special session–emerging memristor based memory and CIM architecture: Test, repair and yield analysis R Bishnoi, L Wu, M Fieback, C Münch, SM Nair, M Tahoori, Y Wang, H Li, ... 2020 IEEE 38th VLSI Test Symposium (VTS), 1-10, 2020 | 13 | 2020 |
| Characterization, modeling and test of synthetic anti-ferromagnet flip defect in STT-MRAMs L Wu, S Rao, M Taouil, EJ Marinissen, GS Kar, S Hamdioui 2020 IEEE International Test Conference (ITC), 1-10, 2020 | 12 | 2020 |
| Hard-to-detect fault analysis in finfet srams GC Medeiros, M Fieback, L Wu, M Taouil, LMB Poehls, S Hamdioui IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (6 …, 2021 | 11 | 2021 |
| Recent trends and perspectives on defect-oriented testing P Bernardi, R Cantoro, A Coyette, W Dobbeleare, M Fieback, A Floridia, ... 2022 IEEE 28th International Symposium on On-Line Testing and Robust System …, 2022 | 9 | 2022 |
| Gemini: a novel hardware and software implementation of high-performance PCIe SSD Y Ou, N Xiao, F Liu, Z Chen, W Chen, L Wu International Journal of Parallel Programming 45, 923-945, 2017 | 9 | 2017 |
| RHS-TRNG: A resilient high-speed true random number generator based on STT-MTJ device S Fu, T Li, C Zhang, H Li, S Ma, J Zhang, R Zhang, L Wu IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023 | 8 | 2023 |
| Testing STT-MRAM: Manufacturing defects, fault models, and test solutions L Wu, S Rao, M Taouil, EJ Marinissen, GS Kar, S Hamdioui 2021 IEEE International Test Conference (ITC), 143-152, 2021 | 8 | 2021 |
| Characterization, modeling, and test of intermediate state defects in STT-MRAMs L Wu, S Rao, M Taouil, EJ Marinissen, GS Kar, S Hamdioui IEEE Transactions on Computers 71 (9), 2219-2233, 2021 | 6 | 2021 |
| Characterization and fault modeling of intermediate state defects in STT-MRAM L Wu, S Rao, M Taouil, EJ Marinissen, GS Kar, S Hamdioui 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 6 | 2021 |
| A DFT scheme to improve coverage of hard-to-detect faults in FinFET SRAMs GC Medeiros, CC Gürsoy, L Wu, M Fieback, M Jenihhin, M Taouil, ... 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 792-797, 2020 | 6 | 2020 |
| MFA-MTJ model: Magnetic-field-aware compact model of pMTJ for robust STT-MRAM design L Wu, S Rao, M Taouil, EJ Marinissen, GS Kar, S Hamdioui IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 5 | 2022 |
| Special session: Stt-mrams: Technology, design and test A Gebregiorgis, L Wu, C Münch, S Rao, MB Tahoori, S Hamdioui 2022 IEEE 40th VLSI Test Symposium (VTS), 1-10, 2022 | 4 | 2022 |
| Dysource: A high performance and scalable NAND flash controller architecture based on source synchronous interface L Wu, N Xiao, F Liu, Y Du, S Li, Y Ou Proceedings of the 12th ACM International Conference on Computing Frontiers, 1-8, 2015 | 4 | 2015 |
Said HamdiouiDelft University of Technology在 tudelft.nl 的电子邮件经过验证
