A tileable switch module architecture for homogeneous 3D FPGAs SA Razavi, MS Zamani, K Bazargan 2009 IEEE International Conference on 3D System Integration, 1-4, 2009 | 239 | 2009 |
Reversible circuit synthesis using a cycle-based approach M Saeedi, MS Zamani, M Sedighi, Z Sasanian ACM Journal on Emerging Technologies in Computing Systems (JETC) 6 (4), 1-26, 2010 | 100 | 2010 |
A novel synthesis algorithm for reversible circuits M Saeedi, M Sedighi, MS Zamani 2007 IEEE/ACM International Conference on Computer-Aided Design, 65-68, 2007 | 93 | 2007 |
A library-based synthesis methodology for reversible logic M Saeedi, M Sedighi, MS Zamani Microelectronics Journal 41 (4), 185-194, 2010 | 84 | 2010 |
Rule-based optimization of reversible circuits M Arabzadeh, M Saeedi, MS Zamani 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 849-854, 2010 | 82 | 2010 |
Synthesis of reversible circuit using cycle-based approach M Saeedi, MS Zamani, M Sedighi, Z Sasanian J. Emerg. Technol. Comput. Syst 6 (4), 13, 2010 | 75 | 2010 |
FPGA-based circuit model emulation of quantum algorithms M Aminian, M Saeedi, MS Zamani, M Sedighi 2008 IEEE Computer Society Annual Symposium on VLSI, 399-404, 2008 | 47 | 2008 |
On the behavior of substitution-based reversible circuit synthesis algorithms: Investigation and improvement M Saeedi, MS Zamani, M Sedighi IEEE Computer Society Annual Symposium on VLSI (ISVLSI'07), 428-436, 2007 | 44 | 2007 |
Block-based quantum-logic synthesis M Saeedi, M Arabzadeh, MS Zamani, M Sedighi arXiv preprint arXiv:1011.2159, 2010 | 42 | 2010 |
Latch-based structure: A high resolution and self-reference technique for hardware trojan detection G Zarrinchian, MS Zamani IEEE Transactions on Computers 66 (1), 100-113, 2016 | 37 | 2016 |
A study on the efficiency of hardware Trojan detection based on path-delay fingerprinting A Nejat, SMH Shekarian, MS Zamani Microprocessors and Microsystems 38 (3), 246-252, 2014 | 36 | 2014 |
A novel reconfigurable hardware architecture for IP address lookup H Fadishei, MS Zamani, M Sabaei Proceedings of the 2005 ACM symposium on Architecture for networking and …, 2005 | 36 | 2005 |
Prediction and reduction of routing congestion M Saeedi, MS Zamani, A Jahanian Proceedings of the 2006 international symposium on Physical design, 72-77, 2006 | 32 | 2006 |
An architecture framework for an adaptive extensible processor H Noori, F Mehdipour, K Murakami, K Inoue, M Saheb Zamani The Journal of Supercomputing 45, 313-340, 2008 | 31 | 2008 |
A cycle-based synthesis algorithm for reversible logic Z Sasanian, M Saeedi, M Sedighi, MS Zamani 2009 Asia and South Pacific Design Automation Conference, 745-750, 2009 | 26 | 2009 |
Quantum physical synthesis: improving physical design by netlist modifications N Mohammadzadeh, M Sedighi, MS Zamani Microelectronics journal 41 (4), 219-230, 2010 | 23 | 2010 |
Depth-optimized reversible circuit synthesis M Arabzadeh, M Saheb Zamani, M Sedighi, M Saeedi Quantum information processing 12, 1677-1699, 2013 | 22* | 2013 |
Moving forward: A non-search based synthesis method toward efficient cnot-based quantum circuit synthesis algorithms M Saeedi, MS Zamani, M Sedighi 2008 Asia and South Pacific Design Automation Conference, 83-88, 2008 | 22 | 2008 |
Automated window-based partitioning of quantum circuits E Nikahd, N Mohammadzadeh, M Sedighi, MS Zamani Physica Scripta 96 (3), 035102, 2021 | 20 | 2021 |
Neutralizing a design-for-hardware-trust technique SMH Shekarian, MS Zamani, S Alami The 17th CSI International Symposium on Computer Architecture & Digital …, 2013 | 20 | 2013 |