Novel dynamic state-deflection method for gate-level design obfuscation J Dofe, Q Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 93 | 2017 |
Hardware security assurance in emerging IoT applications J Dofe, J Frey, Q Yu 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2050-2053, 2016 | 76 | 2016 |
Smart energy optimization for massive IoT using artificial intelligence M Raval, S Bhardwaj, A Aravelli, J Dofe, H Gohel Internet of Things 13, 100354, 2021 | 60 | 2021 |
Hardware security threats and potential countermeasures in emerging 3D ICs J Dofe, Q Yu, H Wang, E Salman Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 69-74, 2016 | 49 | 2016 |
Assessing CPA resistance of AES with different fault tolerance mechanisms H Pahlevanzadeh, J Dofe, Q Yu 2016 21st Asia and South Pacific design automation conference (ASP-DAC), 661-666, 2016 | 47 | 2016 |
A comprehensive FPGA-based assessment on fault-resistant AES against correlation power analysis attack J Dofe, H Pahlevanzadeh, Q Yu Journal of Electronic Testing 32, 611-624, 2016 | 46 | 2016 |
Hardware-efficient logic camouflaging for monolithic 3-D ICs C Yan, J Dofe, S Kontak, Q Yu, E Salman IEEE Transactions on Circuits and Systems II: Express Briefs 65 (6), 799-803, 2017 | 29 | 2017 |
Exploiting hardware obfuscation methods to prevent and detect hardware trojans Q Yu, J Dofe, Z Zhang 2017 IEEE 60th International Midwest Symposium on Circuits and Systems …, 2017 | 26 | 2017 |
Transistor-level camouflaged logic locking method for monolithic 3D IC security J Dofe, C Yan, S Kontak, E Salman, Q Yu 2016 IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), 1-6, 2016 | 25 | 2016 |
Exploiting PDN noise to thwart correlation power analysis attacks in 3D ICs J Dofe, Q Yu Proceedings of the 20th System Level Interconnect Prediction Workshop, 1-6, 2018 | 23 | 2018 |
Security threats and countermeasures in three-dimensional integrated circuits J Dofe, P Gu, D Stow, Q Yu, E Kursun, Y Xie Proceedings of the on Great Lakes Symposium on VLSI 2017, 321-326, 2017 | 23 | 2017 |
Dsd: a dynamic state-deflection method for gate-level netlist obfuscation J Dofe, Y Zhang, Q Yu 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 565-570, 2016 | 16 | 2016 |
Strengthening SIMON implementation against intelligent fault attacks J Dofe, J Frey, H Pahlevanzadeh, Q Yu IEEE Embedded Systems Letters 7 (4), 113-116, 2015 | 16 | 2015 |
Impact of power distribution network on power analysis attacks in three-dimensional integrated circuits J Dofe, Z Zhang, Q Yu, C Yan, E Salman Proceedings of the Great Lakes Symposium on VLSI 2017, 327-332, 2017 | 13 | 2017 |
Efficient hardware Trojan detection with differential cascade voltage switch logic W Danesh, J Dofe, Q Yu VLSI Design 2014 (1), 652187, 2014 | 11 | 2014 |
Improving power analysis attack resistance using intrinsic noise in 3D ICs Z Zhang, J Dofe, Q Yu Integration 73, 30-42, 2020 | 10 | 2020 |
Hardware hardening approaches using camouflaging, encryption, and obfuscation Q Yu, J Dofe, Y Zhang, J Frey Hardware IP security and trust, 135-163, 2017 | 9 | 2017 |
Proactive Defense against Security Threats on IoT Hardware Q Yu, Z Zhang, J Dofe Modeling and Design of Secure Internet of Things, 407-433, 2020 | 8 | 2020 |
Hardware obfuscation methods for hardware Trojan prevention and detection Q Yu, J Dofe, Z Zhang, S Kramer The Hardware Trojan War: Attacks, Myths, and Defenses, 291-325, 2018 | 8 | 2018 |
Unified countermeasures against physical attacks in Internet of Things-a survey J Dofe, A Nguyen, A Nguyen 2021 IEEE International Symposium on Smart Electronic Systems (iSES), 194-199, 2021 | 6 | 2021 |