| Effect of NBTI/PBTI aging and process variations on write failures in MOSFET and FinFET flip-flops Usman Khalid, Antonio Mastrandrea, Mauro Olivieri Microelectronic Reliability 55 (12, Part B), 2614–2626, 2015 | 34 | 2015 |
| Optimal NBTI degradation and PVT variation resistant device sizing in a full adder cell Z Abbas, M Olivieri, U Khalid, A Ripp, M Pronath Reliability, Infocom Technologies and Optimization (ICRITO)(Trends and …, 2015 | 24 | 2015 |
| Novel approaches to quantify failure probability due to process variations in nano-scale CMOS logic U Khalid, A Mastrandrea, M Olivieri 2014 29th International Conference on Microelectronics Proceedings-MIEL 2014 …, 2014 | 17 | 2014 |
| Sensitivity analysis of Probability Transfer Matrix (PTM) on same functionality circuit architectures NSS Singh, NH Hamid, VS Asirvadam, U Khalid, J Anwer Signal Processing and its Applications (CSPA), 2012 IEEE 8th International …, 2012 | 11 | 2012 |
| Evaluation of circuit reliability based on distribution of different signal input patterns NSS Singh, NH Hamid, VS Asirvadam, U Khalid, J Anwer Signal Processing and its Applications (CSPA), 2012 IEEE 8th International …, 2012 | 10 | 2012 |
| Sizing and optimization of low power process variation aware standard cells Z Abbas, U Khalid, M Olivieri Integrated Reliability Workshop Final Report (IRW), 2013 IEEE International …, 2013 | 8 | 2013 |
| Reliability-evaluation of digital circuits using probabilistic computation schemes U Khalid, J Anwer, N Singh, NH Hamid, VS Asirvadam National Postgraduate Conference (NPC), 2011, 1-4, 2011 | 8 | 2011 |
| Highly noise-tolerant design of digital logic gates using Markov Random Field modelling J Anwer, U Khalid, N Singh, NH Hamid, VS Asirvadam Electronic Computer Technology (ICECT), 2010 International Conference on, 24-28, 2010 | 8 | 2010 |
| Computation and analysis of output error probability for C17 benchmark circuit using bayesian networks error modeling U Khalid, J Anwer, N Singh, NH Hamid, VS Asirvadam Research and Development (SCOReD), 2010 IEEE Student Conference on, 348-351, 2010 | 7 | 2010 |
| Safe operation region characterization for quantifying the reliability of CMOS logic affected by process variations U Khalid, A Mastrandrea, M Olivieri 10th IEEE Conference on PhD Research in Microelectronics & Electronics, 2014 | 5 | 2014 |
| Joint and marginal probability analyses of Markov Random Field networks for digital logic circuits J Anwer, U Khalid, N Singh, NH Hamid, VS Asirvadam Intelligent and Advanced Systems (ICIAS), 2010 International Conference on, 1-4, 2010 | 5 | 2010 |
| Combined Impact of NBTI Aging and Process Variations on Noise Margins of Flip-Flops U Khalid, A Mastrandrea, M Olivieri Digital System Design (DSD), 2014 17th Euromicro Conference on, 488-495, 2014 | 4 | 2014 |
| Using safe operation regions to assess the error probability of logic circuits due to process variations U Khalid, A Mastrandrea, M Olivieri 2013 IEEE International Integrated Reliability Workshop Final Report, 177-180, 2013 | 4 | 2013 |
| Fault-tolerance and noise modelling in nanoscale circuit design J Anwer, A Fayyaz, MM Masud, SF Shaukat, U Khalid, NH Hamid Signals Systems and Electronics (ISSSE), 2010 International Symposium on 2, 1-4, 2010 | 4 | 2010 |
| Variability aware modeling of SEU induced failure probability of logic circuit paths in static conditions U Khalid, A Mastrandrea, Z Abbas, M Olivieri Reliability, Infocom Technologies and Optimization (ICRITO) (Trends and …, 2015 | 2 | 2015 |
| A Novel Error-Detection Mechanism for Digital Circuits Using Markov Random Field Modelling J Anwer, U Khalid, N Singh, NH Hamid, VS Asirvadam Computational Intelligence and Communication Networks (CICN), 2012 Fourth …, 2012 | 2 | 2012 |
| Reliable area index: A novel approach to measure reliability of Markov Random Field based circuits J Anwer, SF Shaukat, U Khalid, NH Hamid Intelligent and Advanced Systems (ICIAS), 2012 4th International Conference …, 2012 | 2 | 2012 |
| RELIABILITY-EVALUATION OF NANOSCALE CIRCUIT DESIGN USING BAYESIAN NETWORKS U KHALID UNIVERSITI TEKNOLOGI PETRONAS, 2012 | 1 | 2012 |
| Determination of sensitive inputs of nanoscale digital circuits using Bayesian network analysis U Khalid, J Anwer, N Singh, NH Hamid, VS Asirvadam Micro and Nanoelectronics (RSM), 2011 IEEE Regional Symposium on, 186-189, 2011 | 1 | 2011 |
| Improvement in reliability by changing the deterministic inputs of nanoscale circuits U Khalid, J Anwer, N Singh, NH Hamid, VS Asirvadam Micro and Nanoelectronics (RSM), 2011 IEEE Regional Symposium on, 195-197, 2011 | 1 | 2011 |
Jahanzeb AnwerUniversity of Paderborn在 elmos.com 的电子邮件经过验证
