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Simon Reder
Simon Reder
在 kit.edu 的电子邮件经过验证 - 首页
标题
引用次数
引用次数
年份
Asynchronous parallel mpsoc simulation on the single-chip cloud computer
C Roth, S Reder, G Erdogan, O Sander, GM Almeida, H Bucher, J Becker
2012 International Symposium on System on Chip (SoC), 1-8, 2012
182012
Wcet-aware parallelization of model-based applications for multi-cores: The argo approach
S Derrien, I Puaut, P Alefragis, M Bednara, H Bucher, C David, Y Debray, ...
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
152017
Adaptive algorithm and tool flow for accelerating systemc on many-core architectures
C Roth, S Reder, H Bucher, O Sander, J Becker
2014 17th Euromicro Conference on Digital System Design, 137-145, 2014
152014
A SystemC modeling and simulation methodology for fast and accurate parallel MPSoC simulation
C Roth, H Bucher, S Reder, F Buciuman, O Sander, J Becker
2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2013
132013
A framework for exploration of parallel SystemC simulation on the single-chip cloud computer
C Roth, S Reder, O Sander, M Hübner, J Becker
Fifth International Conference on Simulation Tools and Techniques, 2012
92012
A WCET-aware parallel programming model for predictability enhanced multi-core architectures
S Reder, L Masing, H Bucher, T ter Braak, T Stripf, J Becker
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 943-948, 2018
72018
Adaptive algorithm and tool flow for accelerating SystemC on many-core architectures
S Reder, C Roth, H Bucher, O Sander, J Becker
Microprocessors and Microsystems 39 (8), 1063-1075, 2015
62015
Worst-case execution-time-aware parallelization of model-based avionics applications
S Reder, F Kempf, H Bucher, J Becker, P Alefragis, N Voros, S Skalistis, ...
Journal of Aerospace Information Systems 16 (11), 521-533, 2019
52019
Mapping and scheduling hard real time applications on multicore systems-the argo approach
P Alefragis, G Theodoridis, M Katsimpris, C Valouxis, C Gogos, G Goulas, ...
Applied Reconfigurable Computing. Architectures, Tools, and Applications …, 2018
42018
Interference-aware memory allocation for real-time multi-core systems
S Reder, J Becker
2020 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS …, 2020
32020
Improving parallel mpsoc simulation performance by exploiting dynamic routing delay prediction
C Roth, H Bucher, S Reder, O Sander, J Becker
2013 8th International Workshop on Reconfigurable and Communication-Centric …, 2013
22013
Wcet-aware code generation and communication optimization for parallelizing compilers
S Reder, J Becker
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 210-215, 2020
12020
Compileroptimierung und parallele Code-Generierung für zeitkritische eingebettete Multiprozessorsysteme
S Reder
Dissertation, Karlsruhe, Karlsruher Institut für Technologie (KIT), 2020, 2020
2020
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