| Transaction level modeling: an overview L Cai, D Gajski Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware …, 2003 | 862 | 2003 |
| System-on-chip environment: A SpecC-based framework for heterogeneous MPSoC design R Dömer, A Gerstlauer, J Peng, D Shin, L Cai, H Yu, S Abdi, DD Gajski EURASIP Journal on Embedded Systems 2008, 1-13, 2008 | 162 | 2008 |
| Transaction level modeling in system level design L Cai, D Gajski Center for Embedded Computer Systems, 2003 | 79 | 2003 |
| Retargetable profiling for rapid, early system-level design space exploration L Cai, A Gerstlauer, D Gajski Proceedings of the 41st annual Design Automation Conference, 281-286, 2004 | 73 | 2004 |
| Comparison of Specfic and SystemC languages for system design L Cai, S Verma, DD Gajski CECS, University of California, Irvine, CA, USA, Tech. Rep, 2003 | 42* | 2003 |
| Top-down system level design methodology using SpecC, VCC and SystemC L Cai, P Kritzinger, M Olivares, D Gajski Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002 | 24 | 2002 |
| Method and apparatus for detecting and dealing with a lost electronics device L Cai, JR Menendez, RB Silverstein, R Parameswaran US Patent 9,392,092, 2016 | 23 | 2016 |
| Design of a JPEG encoding system L Cai, J Peng, C Chang, A Gerstlauer, H Li, A Selka, C Siska, L Sun, ... | 23 | 1999 |
| Handling impaired wireless connection in a communication system P Xiang, H Huang, L Cai, KH El-Maleh US Patent 9,578,495, 2017 | 18 | 2017 |
| Introduction of system level architecture exploration using the SpecC methodology L Cai, D Gajski, M Olivarez ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems …, 2001 | 15 | 2001 |
| Introduction of design-oriented profiler of Specfic language L Cai, D Gajski Center for Embedded Computer System, 2002 | 14 | 2002 |
| System-on-chip component models A Gerstlauer, L Cai, D Shin, R Dömer, DD Gajski UC Irvine, Irvine, CA, Tech. Rep. CECS-TR-06-10, 2006 | 13 | 2006 |
| Multi-metric and multi-entity characterization of applications for early system design exploration L Cai, A Gerstlauer, D Gajski Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005 | 13 | 2005 |
| A novel memory size model for variable-mapping in system level design L Cai, H Yu, D Gajski ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE …, 2004 | 11 | 2004 |
| Estimation and exploration automation of system level design L Cai University of California, Irvine, 2004 | 10 | 2004 |
| System-on-chip environment (SCE version 2.2. 0 beta): Manual L Cai, A Gerstlauer, S Abdi, J Peng, D Shin, H Yu, R Dömer, D Gajski Center for Embedded Computer Systems, University of California, Irvine, Tech …, 2003 | 9 | 2003 |
| C/C++ Based System Design Flow using SpecC, VCC and SystemC L Cai, M Olivarez, P Kritzinger, D Gajski System Specification & Design Languages: Best of FDL’02, 185-194, 2003 | 8 | 2003 |
| Design of a JBIG encoder using specC methodology J Peng, L Cai, A Selka, DD Gajski | 8 | 2000 |
| System-on-Chip Transaction-Level Modeling Style Guide D Shin, L Cai, A Gerstlauer, R Dömer, DD Gajski Technical Report CECS-TR-04-24, Center for Embedded Computer Systems …, 2004 | 6 | 2004 |
| Channel mapping in system level design L Cai, D Gajski Center for Embedded Computer Systems, 2003 | 5 | 2003 |
