| System, method and apparatus for improving transactional memory (TM) throughput using TM region indicators OM Shaikh, R Rajwar, P Caprioli, MM Al-Otoom US Patent 9,411,739, 2016 | 35 | 2016 |
| Accelerated interlane vector reduction instructions P Caprioli, AS Kanhere, JJ Cook, MM Al-Otoom US Patent 9,588,766, 2017 | 32 | 2017 |
| EXACT: Explicit dynamic-branch prediction with active updates M Al-Otoom, E Forbes, E Rotenberg Proceedings of the 7th ACM international conference on Computing frontiers …, 2010 | 27 | 2010 |
| Predictors with Adaptive Prediction Threshold MM Al-Otoom, TH Heil, A Krishna, K Van Vu, IBM Corporation US Patent 8,078,852, 2011 | 20 | 2011 |
| Hardware profiling mechanism to enable page level automatic binary translation P Caprioli, MC Merten, MM Al-Otoom, OM Shaikh, AS Kanhere, S Srinivas, ... US Patent 9,542,191, 2017 | 16 | 2017 |
| Memory disambiguation hardware to support software binary translation MM Al-Otoom, P Caprioli, AS Kanhere, A Krishnaswamy, OM Shaikh US Patent 8,826,257, 2014 | 16 | 2014 |
| Instruction and logic to control transfer in a partial binary translation system P Caprioli, MG Dixon, BL Toll, MM Al-Otoom, OM Shaikh US Patent 9,652,234, 2017 | 10 | 2017 |
| Detection of memory address aliasing and violations of data dependency relationships MM Al-Otoom, P Caprioli, R Carlson, HS Kim, O Shaikh US Patent 9,292,294, 2016 | 9 | 2016 |
| Detecting and Filtering Biased Branches in Global Branch History MM Al-Otoom, P Caprioli, JJ Cook US Patent App. 13/691,049, 2014 | 9 | 2014 |
| Branch prediction system MM Al-Otoom, ID Kountanis, C Blasco US Patent 10,719,327, 2020 | 7 | 2020 |
| A case for a software-managed reconfigurable branch predictor M Al-Otoom, R Sheikh, E Rotenberg 5th Workshop on Architectural and Microarchitectural Support for Binary …, 2012 | 7 | 2012 |
| System and method for predicting memory dependence when a source register of a push instruction matches the destination register of a pop instruction MM Al-Otoom, C Blasco, D Duggal, KN Kothari, RF Russo US Patent 10,838,729, 2020 | 6 | 2020 |
| Cache for patterns of instructions with multiple forward control transfers MM Al-Otoom, ID Kountanis, RP Hall, ML Karm US Patent 9,632,791, 2017 | 4 | 2017 |
| Indirect branch predictor based on register operands MM Al-Otoom, ID Kountanis, C Blasco, H Jia, A Kumar US Patent 11,379,240, 2022 | 1 | 2022 |
| Register allocation using physical register file bypass I Kountanis, M Al-Otoom US Patent 10,691,457, 2020 | 1 | 2020 |
| System, Method, and Apparatus for Improving Throughput of Consecutive Transactional Memory Regions OM Shaikh, R Rajwar, P Caprioli, MM Al-Otoom US Patent App. 15/382,476, 2017 | 1 | 2017 |
| Multi-table signature prefetch DC Holman, ID Kountanis, A Kumar, MM Al-Otoom US Patent 11,630,670, 2023 | | 2023 |
| Zero cycle load bypass in a decode group D Duggal, KN Kothari, C Blasco, MM Al-Otoom US Patent 11,416,254, 2022 | | 2022 |
| History file for previous register mapping storage and last reference indication D Duggal, C Blasco, MM Al-Otoom, RF Russo US Patent 11,200,062, 2021 | | 2021 |
| Hardware profiling mechanism to enable page level automatic binary translation P Caprioli, MC Merten, MM Al-Otoom, OM Shaikh, AS Kanhere, S Srinivas, ... US Patent App. 15/403,120, 2017 | | 2017 |
