| Design of a Gabor filter-based image denoising hardware model V Dakshayani, GR Locharla, P Pławiak, V Datti, C Karri Electronics 11 (7), 1063, 2022 | 13 | 2022 |
| Architecture design and FPGA implementation of CORDIC algorithm for fingerprint recognition applications P Revathi, MVN Rao, GR Locharla Procedia Technology 6, 371-378, 2012 | 9 | 2012 |
| A study on look-up table based sine wave generation A Salazar, G Bahubalindruno, G Locharla, HS Mendonça, JC Alves, ... Proceedings of the Regional Echomail Coordinator, Porto, Portugal, 3-4, 2011 | 9 | 2011 |
| Variable length mixed radix MDC FFT/IFFT processor for MIMO‐OFDM application GR Locharla, KK Mahapatra, S Ari IET Computers & Digital Techniques 12 (1), 9-19, 2018 | 8 | 2018 |
| Implementation of MIMO data reordering and scheduling methodologies for eight‐parallel variable length multi‐path delay commutator FFT/IFFT GR Locharla, SK Kallur, KK Mahapatra, S Ari IET Computers & Digital Techniques 10 (5), 215-225, 2016 | 6 | 2016 |
| Implementation of input data buffering and scheduling methodology for 8 parallel MDC FFT GR Locharla, KS Kumar, KK Mahapatra, S Ari 2015 19th International Symposium on VLSI Design and Test, 1-6, 2015 | 4 | 2015 |
| Review of the Convolution Neural Network Architectures for Deep Learning YA Govinda Rao Locharla, Jaya Prakash Allam, Y.V Narayana International Journal of Advanced Science and Technology 29 (4), 2251 – 2262, 2020 | 3 | 2020 |
| Radix-8 modified Booth fixed-width signed multipliers with error compensation GR Locharla, KK Mahapatra, S Ari Arabian Journal for Science and Engineering 46, 1115-1125, 2021 | 2 | 2021 |
| Design and FPGA implementation of DAA based FIR filter G Naidu, BA Kumar, GR Locharla Int. J. Sci. Res. Publ 2 (7), 2012 | 1 | 2012 |
| Architecture design and fpga implementation of an fft based reactive power meter MSR Naidu, GR Locharla, G Naidu International Journal of Computer Applications 50 (9), 2012 | 1 | 2012 |
| Compression Techniques for Low Power Hardware Accelerator Design: Case Studies GR Locharla, P Revathi, MVN Rao Advances in Signal Processing and Communication Engineering: Select …, 2022 | | 2022 |
| Design of Gabor Filter Based Image Denoising Hardware Model. Electronics 2022, 11, 1063 V Dakshayani, GR Locharla, P Pławiak, V Datti, C Karri s Note: MDPI stays neutral with regard to jurisdictional claims in published …, 2022 | | 2022 |
| Design of Sigmoid Architecture for Deep Learning Hardware Accelerators KKP Govinda Rao Locharla1,*, P.Sirish Kumar2 Design Engineering 2021 (8), 12413 - 12419, 2021 | | 2021 |
| Variable length FFT/IFFT Processor: Algorithm to Architecture Mapping and Implementation GR Locharla | | 2018 |
Kamalakanta MahapatraPROFESSOR, NIT Rourkela在 nitrkl.ac.in 的电子邮件经过验证
