CompAct: on-chip com pression of act ivations for low power systolic array based CNN acceleration

J Zhang, P Raj, S Zarar, A Ambardekar… - ACM Transactions on …, 2019 - dl.acm.org
This paper addresses the design of systolic array (SA) based convolutional neural network
(CNN) accelerators for mobile and embedded domains. On-and off-chip memory accesses …

[PDF][PDF] CompAct: On-chip Compression of Activations for Low Power Systolic Array Based CNN Acceleration

JJUN ZHANG, P RAJ, S ZARAR, A AMBARDEKAR… - 2019 - researchgate.net
Deep neural networks (DNN) provide best-in-class accuracy for a range of machine learning
tasks including text, speech, image and video [18, 21, 32]. DNNs are composed of multiple …

Compact: On-chip compression of activations for low power systolic array based CNN acceleration

J Zhang, P Raj, S Zarar… - ACM Transactions on …, 2019 - nyuscholars.nyu.edu
This paper addresses the design of systolic array (SA) based convolutional neural network
(CNN) accelerators for mobile and embedded domains. On-and off-chip memory accesses …