Design of low-error fixed-width multiplier for DSP applications

JM Jou, SR Kuang - Electronics Letters, 1997 - IET
A low-error design of the fixed-width parallel multiplier for digital signal processing (DSP)
applications is proposed. Applying two n bit inputs, it generates the n bit, instead of 2n bit …
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Fixed-width multiplier for DSP application

SJ Jou, HH Wang - 2000 International Conference on Computer …, 2000 - scholar.nycu.edu.tw
A new compensation method that reduce the error of fixed-width multiplier for digital signal
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[引用][C] Design of low-error fixed-width multiplier for DSP applications

JM Jou, SR Kuang - Electronics Letters, 1997 - ui.adsabs.harvard.edu
Design of low-error fixed-width multiplier for DSP applications - NASA/ADS Now on home
page ads icon ads Enable full ADS view NASA/ADS Design of low-error fixed-width …

[引用][C] Design of low-error fixed-width multiplier for DSP applications

JM Jou, SR Kuang - Electronics Letters, 1997 - ieeexplore.ieee.org
A low-error design of the fixed-width parallel multiplier for digital signal processing (DSF)
applications is proposed. Applying two n bit inputs, it generates the n bit, instead of 2n bit …

Fixed-Width Multiplier for DSP Application

SJ Jou, HH Wang - Proceedings 2000 International Conference on …, 2000 - computer.org
Tattoo is a soft biometric that indicates discriminative characteristics of a person such as
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Design of low-error fixed-width multiplier for DSP applications

JM Jou, SR Kuang - Electronics Letters, 1997 - researchoutput.ncku.edu.tw
A low-error design of the fixed-width parallel multiplier for digital signal processing (DSP)
applications is proposed. Applying two n bit inputs, it generates the n bit, instead of 2n bit …

[引用][C] DESIGN OF LOW-ERROR FIXED-WIDTH MULTIPLIER FOR DSP APPLICATIONS

JERMIN JOU, SR KUANG - Electronics letters, 1997 - Institution of Engineering and …