12 bits, 40MS/s, low power pipelined SAR ADC

VK Lazarjan, K Hajsadeghi - 2014 IEEE 57th International …, 2014 - ieeexplore.ieee.org
This paper presents a low power SAR ADC utilizing pipelining to increase the resolution up
to 12 bits while maintaining a high speed sampling rate. Novel system level modifications …
被引用次数：2 相关文章

12 bits, 40MS/s, low power pipelined SAR ADC

VK Lazarjan, K Hajsadeghi - 2014 IEEE 57th International Midwest Symposium … - infona.pl
This paper presents a low power SAR ADC utilizing pipelining to increase the resolution up
to 12 bits while maintaining a high speed sampling rate. Novel system level modifications …