A 7.1 mW 10GHz all-digital frequency synthesizer with dynamically reconfigurable digital loop filter in 90nm CMOS
SY Yang, WZ Chen - … Solid-State Circuits Conference-Digest of …, 2009 - ieeexplore.ieee.org
SY Yang, WZ Chen
2009 IEEE International Solid-State Circuits Conference-Digest of …, 2009•ieeexplore.ieee.orgADPLL frequency synthesizers have recently drawnsignificant research attention as the
technology paradigm shifts into the nanometer CMOS arena [1–5]. They circumvent several
design issues that conventional charge-pump-based PLLs encounter, including capacitor
leakage, current mismatch, and limited dynamic range. Furthermore, they benefit from
replacing the bulky passive loop filter by a more cost-effective and flexible digital filter.
technology paradigm shifts into the nanometer CMOS arena [1–5]. They circumvent several
design issues that conventional charge-pump-based PLLs encounter, including capacitor
leakage, current mismatch, and limited dynamic range. Furthermore, they benefit from
replacing the bulky passive loop filter by a more cost-effective and flexible digital filter.
ADPLL frequency synthesizers have recently drawnsignificant research attention as the technology paradigm shifts into the nanometer CMOS arena [1–5]. They circumvent several design issues that conventional charge-pump-based PLLs encounter, including capacitor leakage, current mismatch, and limited dynamic range. Furthermore, they benefit from replacing the bulky passive loop filter by a more cost-effective and flexible digital filter.
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