A multilevel inverter structure based on a combination of switched-capacitors and DC sources

A Taghvaie, J Adabi… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
IEEE Transactions on Industrial Informatics, 2017ieeexplore.ieee.org
This paper presents a switched-capacitor multilevel inverter (SCMLI) combined with multiple
asymmetric dc sources. The main advantage of proposed inverter with similar cascaded
MLIs is reducing the number of isolated dc sources and replacing them with capacitors. A
self-balanced asymmetrical charging pattern is introduced in order to boost the voltage and
create more voltage levels. Number of circuit components such as active switches, diodes,
capacitors, drivers, and dc sources reduces in proposed structure. This multistage hybrid …
This paper presents a switched-capacitor multilevel inverter (SCMLI) combined with multiple asymmetric dc sources. The main advantage of proposed inverter with similar cascaded MLIs is reducing the number of isolated dc sources and replacing them with capacitors. A self-balanced asymmetrical charging pattern is introduced in order to boost the voltage and create more voltage levels. Number of circuit components such as active switches, diodes, capacitors, drivers, and dc sources reduces in proposed structure. This multistage hybrid MLI increases the total voltage of used dc sources by multiple charging of the capacitors stage by stage. A bipolar output voltage can be inherently achieved in this structure without using single phase H-bridge inverter that was used in traditional SCMLIs to generate negative voltage levels. This eliminates requirements of high-voltage rating elements to achieve negative voltage levels. A 55-level step-up output voltage (27 positive levels, a zero level, and 27 negative levels) are achieved by a three-stage system that uses only three asymmetrical dc sources (with amplitude of 1 V in , 2 V in, and 3 V in ) and seven capacitors (self-balanced as multiples of 1 V in ). MATLAB/SIMULINK simulation results and experimental tests are given to validate the performance of proposed circuit.
ieeexplore.ieee.org
以上显示的是最相近的搜索结果。 查看全部搜索结果