A multilevel inverter is capable of generating high-quality stepwise pseudo-sinusoidalvoltage with low THD , applicable to high-power and high-voltage systems. These types of topologiesmay require a large number of switches and power supplies. This leads to much cost, large size, andcomplicated control algorithms. Thus, newer topologies are being proposed to decrease the numberof power electronic devices for a large number of levels in output voltage. Recently, a new multilevelinverter has been reported in the literature to reduce component count. Its structure requires a lowernumber of active switches as compared to the existing ones. The available literature presents ageneralization of the topology with an especial asymmetrical sources ratio, but no investigations aremade for other symmetrical or asymmetrical sources ratio with cascaded configurations. This studypresents a comprehensive analysis of cascaded topologies with the proposed basic units. The topologyis analysed for both symmetric and asymmetric DC source configurations. Also, two algorithms forasymmetric source configuration suitable for cascaded structures are proposed. Moreover, the designand simulation of a 147-level inverter are presented under an optimal number of DC sources and powerswitches. Furthermore, experimental validation is performed by implementing a laboratory prototype.