This paper investigates the thermal vias (TVs) design in PCB-based power circuits; the study aims to experimentally validate an analytical model for the quick estimation of the TVs thermal resistance. Such a model efficiently supports the identification of the optimum PCB layout and allows avoiding time-demanding numerical simulations and/or nontrivial measurements. An experimental procedure performed on ad hoc PCB samples is exploited to confirm the model accuracy. The results of repeated measures and their statistical distribution are reported and discussed along with the model predictions.