With the advent and rapid development of technology, the utilization of digital products in the market has a wide acceptance and became handy. The complexity of the circuits is miniaturized by scaling down the size of the components. A memory of system on chip (SOC) architecture consumes a maximum of 70% power. Due to advantages of FFET such as the higher current driving capability, high switching speed, better control on the channel, low static leakage current, and low switching power, it is applicable in real-time issues like leakage power and delay to solve. These advantages lead to the design of SRAM using Fin FET under deep submicron technology using Modified Gate diffusion input (MGDI) technique. Therefore, static power is getting reduced by improving logic swing. The proposed SRAM model is designed using “FinFET based Gate diffused input (MGDI)” technique and analyzed its functionality of reading and write operationa and  estimate the performance of static and dynamic power. Finally compares with GDI based SRAM. Some of the applications that includes the high speed and low power applications. This research article indicated the MGI technique improves the power 17% in total power and 3% in static power.