DOI: 10.1002/adma. 201306050 oscillators and logic gates. A key challenge is that the substrate materials must have the necessary chemical resistance and temperature stability to accommodate this processing. Examples in the literature avoid these issues by, for instance, use of shadow masks, rather than photolithography and etching, to define the interconnect structures. Severe limitations in resolution and materials options associated with this approach. For example, use of shadow masks does not allow feature sizes below several microns, and processing must be performed well below the glass transition temperature of the substrate material. This situation motivates the development of alternative strategies. In the following, we introduce a fabrication approach whose key feature is that it separates processing of the electronic systems from the target device substrate. Here, transfer of the complete structure, including interconnects, from a temporary substrate where it is fabricated to a final device substrate for its operation avoids constraints associated with the intrinsic properties of biodegradable polymers and thereby enables mounting on nearly any surface or class of material. We demonstrate these schemes in various representative devices and arrays, with a range of degradable substrate materials, including poly lacticco-glycolic acid (PLGA), a copolymer of poly lactic acid (PLA) and poly glycolic acid (PGA), PLA, polycaprolactone (PCL) and rice paper. The resulting systems can be laminated onto various other supporting surfaces with either planar or nonplanar shapes. The content begins with descriptions of these procedures and mechanical/chemical considerations in materials selection. Various demonstrations, including devices that incorporate functional arrays of hydration sensors, illustrate the capabilities.

The key to expanding the materials options is to separate deposition, etching and lithographic patterning associated with fabrication of the electronic components from the biodegradable substrates. Figure 1a describes procedures that begin with spin casting of a sacrificial layer of poly (methylmethacrylate)(PMMA, MicroChem, USA) followed by an ultrathin layer of diluted polyimide (D-PI)(∼ 200 nm) on a silicon (Si) wafer. Transfer printing then delivers patterned, doped silicon nanomembranes (Si NMs) or fully formed ultrathin silicon microdevices to the surface of the D-PI layer in spatial layouts that match requirements. Depositing other materials and patterning them by photolithography yield completed systems of electronics, integrated sensors and/or power supplies. For examples reported here, these steps include plasma-enhanced chemical vapor deposition (PECVD) of SiO 2 (∼ 50 nm) for gate and interlayer dielectrics, and Mg (∼ 300 nm) for source, drain, gate contacts, and interconnects. Afterward, spin casting