Method and apparatus for memory array compressed data testing
B Keeth, TA Manning, CG Martin, KM Pierce… - US Patent …, 1999 - Google Patents
Amemory device includes an output data path that transfers data from an I/O circuit coupled
to a memory array to an output tri-state buffer. A comparing circuit compares data from the
I/O circuit to a desired data pattern. If the data does not match the desired pattern, the
comparing circuit outputs an error signal that is input to the output buffer. When the output
buffer receives the error signal, the output buffer is disabled and outputs a tri-state condition
on a data bus. Since the error signal corresponds to more than one data bit, the tri-state …
to a memory array to an output tri-state buffer. A comparing circuit compares data from the
I/O circuit to a desired data pattern. If the data does not match the desired pattern, the
comparing circuit outputs an error signal that is input to the output buffer. When the output
buffer receives the error signal, the output buffer is disabled and outputs a tri-state condition
on a data bus. Since the error signal corresponds to more than one data bit, the tri-state …
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