Multiprocessor with pair-wise high reliability mode, and method therefore

SH Dhong, HP Hofstee, R Nair… - US Patent 6,772,368, 2004 - Google Patents
In one embodiment a multiprocessing apparatus includes a first processor and a Second
processor. Each of the proces SorS have their own data and instruction caches to Support
independent operation. In a normal mode the processors independently execute Separate
instruction Streams. Each of the processors has a respective Signature generator. The
System also includes a compare unit coupled to the Signature generators. In a high
reliability mode, both processors execute the same instruction Stream. That is, each …
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