Physical insights into phosphorene transistor degradation under exposure to atmospheric conditions and electrical stress

J Kumar, A Yadav, A Singh, A Naclerio… - 2020 IEEE …, 2020 - ieeexplore.ieee.org
2020 IEEE International Reliability Physics Symposium (IRPS), 2020ieeexplore.ieee.org
In spite of promising properties like high mobility, tunable band gap, etc. Phosphorene's
promise to be a beyond CMOS material is hindered by its instability and fast degradation
when exposed to ambient conditions. In this work, we performed a systematic study of
Phosphorene degradation, under different influencing parameters, using detailed atomistic
(DFT) computations and electrical, optical (Raman and PL) as well as physical (high
resolution TEM) experiments. We observed that O 2 dominates over other gases to degrade …
In spite of promising properties like high mobility, tunable band gap, etc. Phosphorene's promise to be a beyond CMOS material is hindered by its instability and fast degradation when exposed to ambient conditions. In this work, we performed a systematic study of Phosphorene degradation, under different influencing parameters, using detailed atomistic (DFT) computations and electrical, optical (Raman and PL) as well as physical (high resolution TEM) experiments. We observed that O 2 dominates over other gases to degrade phosphorene. O 2 is adsorbed chemically and dissociates over Phosphorene while other gases like, Ar, CO 2 , H 2 O and N 2 , have physical adsorption over it with weak van der Waals (vdW) interactions. The degradation rate is anisotropic with maximum and minimum along [001] and [010] planes, respectively. Gate bias plays a significant role in Phosphorene FET instability. The degradation is enhanced under positive gate bias due to enhanced oxidation by gate field induced electron in the FET channel. The degradation however was found to be missing when channel was populated with holes under negative gate bias.
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