We have performed a detailed evaluation of radiation-induced charge trapping and low-frequency noise for back-gated graphene transistors fabricated on a thermal SiO ₂ layer, with Al ₂ O ₃ or hexagonal boron nitride passivation over-layers. Irradiation with positive or 0 V back-gate bias leads to negative shifts of the charge neutral point (CNP) of the graphene transistors; irradiation under negative back-gate bias leads to positive CNP shifts. The low-frequency noise increases with irradiation and decreases with 400 K postirradiation annealing. The temperature dependence of the noise is described well by the Dutta-Horn model of low-frequency noise. Peaks in effective defect-energy distributions of irradiated devices at ~0.4 and ~0.7 eV are identified via measurements of the temperature dependence of the low-frequency noise. The noise of as-processed devices stored in room ambient also decreases with baking, but does not show the clear peaks observed after irradiation. Density functional theory calculations suggest that OH ^- and H ⁺ at or near the graphene/dielectric interfaces likely play key roles in both the irradiation and baking response. Low-frequency noise and CNP voltage shifts during switched-bias postirradiation annealing at room temperature also suggest significant roles for O vacancies in the near interfacial SiO ₂ and/or passivation layers.