We perform a detailed reliability study of MoS ₂ , MoSe ₂ , MoTe ₂ and WS ₂ field-effect transistors fabricated on the same SiO ₂ /Si substrate. First we analyze the sensitivity of these devices to adsorbate-type trapping sites on top of the channel and show that their contribution can be minimized at high temperatures, which leads to a domination of charge trapping by oxide traps. Then we compare the high-temperature dynamics of the hysteresis and bias-temperature instabilities for different devices. Our results show that the observed differences can be partially explained by the alignment of known defect bands in SiO ₂ relative to the conduction and valence band edges of the two-dimensional channel materials. As such, our study provides strong fundamental insights into the reliability of these new technologies and opens further perspectives on how to reach commercial quality standards.