In this paper, fully recessed-gate GaN MISFETs with two different gate dielectrics, i.e., plasma-enhanced atomic layer deposition (PEALD) SiN and ALD Al ₂ O ₃ gate dielectric, are used to study the origin of positive bias temperature instability (PBTI). By employing a set of dedicated stress-recovery tests, we study PBTI during the stress and relaxation. Hence, a defect band model with different distributions of defect levels inside the gate dielectric is proposed, which can excellently reproduce the experimental data and provide insightful information about the origin of PBTI in GaN MISFETs. The results indicate that the serious PBTI in the device with PEALD SiN is mainly due to a wide distribution of defect levels (σ ~ 0.67 eV), centered below the conduction band of GaN (E _C - 0.05 eV), and can be easily accessed by the channel carriers already at a low-gate voltage. On the other hand, ALD Al ₂ O ₃ gate dielectric shows a narrower distribution of defects (σ ~ 0.42 eV), which are far from the conduction band of GaN (E _C + 1.15 eV). This observations explain the improved PBTI reliability observed in devices with ALD Al ₂ O ₃ .