Reliability assessment is an important part of the design process of digital integrated circuits. We observe that a common thread that runs through most causes of run-time failure is the extent of circuit activity, ie, the rate at which its nodes are switching. We propose a new measure of activity, called the transition density, which may be defined as the“average switching rate” at a circuit node. Based on a stochastic model of logic signals, we rigorously define the transition density and present an algorithm to propagate it from the primary inputs to internal and output nodes. This algorithm may be thought of as a simulation of the circuit, and has been implemented in a prototype density simulator. We present some results of this implementation to verify the theoretical results and assess the feasibility of the approach. In order to obtain the same density information by traditional means, the circuit would need to be simulated for thousands of input transitions. Thus this approach is very efficient and makes possible the analysis of VLSI circuits, which are traditionally too big to simulate for long input sequences.