Serial two's complement pipeline multipliers are the basic module in the serial arithmetic
implementation of digital signal processing algorithms. These multipliers accept the data …

The pipeline form of the serial/parallel multiplier for constant numbers, which operates
without insertion of zero words between successive data, is presented. The constant number …

Digital filters and signal processors when realized in hardware often use serial transfer of
data. Multipliers which are capable of accepting variable coefficients and data in sign and …

An improved architecture of the Muller pipeline serialparallel multiplier is presented. The
proposed solution is based on the integration of two Muller cells into one. This modification …

Applications & Technology Page 1 International Conference On Signal Processing
Applications & Technology TIT Page 2 High Speed and Very Compact Two's Complement …

This paper presents a new multiplier design which is fully-serial and requires only 1.5 N
cycles to return a product. This design has been implemented for both unsigned and two's …

The Booth (1951) encoding technique, used in parallel multipliers seems to be obsolete
because of the improvement of compression trees using 4: 2 compressors. This article …

A new algorithm for the multiplication of two n-bit numbers based on the synchronous
computation of the partial sums of the two operands is presented. The proposed algorithm …

A new two's complement parallel multiplier architecture is proposed. It is based on the
partitioning of one of the operands into four groups. Array multipliers without the final adder …

The digital multiplication of two numbers of any sign by the successive addition of partial
products is critically examined for the purpose of reducing the time of computation. The …