This paper proposes a merged delay line (MDL) field-programmable gate array (FPGA)
based time-to-digital converter (TDC). Instead of traditional tapped delay line (TDL), the …

This article presents a low-hardware consumption, resolution-configurable, automatically
calibrating gray code oscillator time-to-digital converter (TDC) in Xilinx 16-nm UltraScale+ …

This paper presents a linear-mode light detection and ranging (LiDAR) analog front-end
architecture with multiplex analog-to-digital converter/time-to-digital converter (ADC/TDC) …

Time-to-digital converters (TDCs) based on field-programmable gate array (FPGA) generally
use a tapped delay line (TDL) to propagate the hit signal for time interpolation within one …

Recently, advancements have been made in the design, implementation, and application of
time-to-digital converters (TDCs) based on field-programmable gate array (FPGA) …

We describe a study on the effect of temperature variations on multi-channel time-to-digital
converters (TDCs). The objective is to study the impact of ambient thermal variations on the …

A high-resolution time-to-digital converter (TDC) was designed and tested. The converter is
based on the fundamental method of counting the full clock cycles of a low-phase-noise …

This paper presents a time-to-digital converter (TDC) based on a field programmable gate
array (FPGA) with a tapped delay line (TDL) architecture. This converter employs dual delay …

Time-to-Digital Converters (TDCs) are key building blocks in time-based mixed-signal
systems, used for the digitization of analog signals in time domain. A short survey on state-of …

In this work, we present a compact “adaptive downsampling” method that mitigates the
nonlinearity problems associated with FPGA-based TDCs that utilize delay lines …