Reliability of Network-on-Chip has become a critical problem because of the aggressive technology scaling. A variety of transmission mechanism to tolerant the bit errors has been proposed to achieve the best trade-off between performance and overhead. In this work, a transmission mechanism for NoC based on a novel combination of error detection, error correction, and retransmission is proposed. The light-weight error detectors are integrated into the input ports of routers to check the correctness of head flits and the decoders in Network Interfaces (NIs) are used to correct the errors in any flits of the whole packet. With a very small hardware overhead, the proposed method can guarantee high reachability of packets and greatly decrease End-to-End retransmission. Compared with Hop-to-Hop and End-to-End mechanism, the latency could be highly reduced.