Analog integrated circuit topology synthesis with deep reinforcement learning
Z Zhao, L Zhang - … -Aided Design of Integrated Circuits and …, 2022 - ieeexplore.ieee.org
… This article proposes a novel mechanism to reduce the number of circuit topologies to be
sized by utilizing the merits of deep reinforcement learning (RL), which is able to significantly …
sized by utilizing the merits of deep reinforcement learning (RL), which is able to significantly …
Fast Automatic Circuit Design Framework Using Genetic and Reinforcement Learning Algorithm
홍지우 - 2022 - s-space.snu.ac.kr
… circuit structures to meet the given design constraints. In this work, we propose an automatic
circuit design framework that can generate practical circuit … discuss reinforcement learning …
circuit design framework that can generate practical circuit … discuss reinforcement learning …
A deep reinforcement learning approach for global routing
… in IC design. This work presents a deep reinforcement learning (DRL)-driven approach to IC
… mechanism to effectively address the unique challenges in IC global routing. DRL combines …
… mechanism to effectively address the unique challenges in IC global routing. DRL combines …
A reinforcement learning-based framework for solving physical design routing problem in the absence of large test sets
U Gandhi, I Bustany, W Swartz… - … on Machine Learning for …, 2019 - ieeexplore.ieee.org
… and labeled data. In this work, we propose a data-independent reinforcement learning (RL)
based routing model called Alpha-PD-Router, which learns to route a circuit and …
based routing model called Alpha-PD-Router, which learns to route a circuit and …
Data-flow graph mapping optimization for CGRA with deep reinforcement learning
… Inspired from the great progress in deep reinforcement learning (RL) for AI problems, we
consider building methods that learn to map DFGs onto spatially programmed CGRAs directly …
consider building methods that learn to map DFGs onto spatially programmed CGRAs directly …
GCN-RL circuit designer: Transferable transistor sizing with graph neural networks and reinforcement learning
… circuit to another to reduce the re-design overhead. In this paper, we present GCN-RL Circuit
Designer, leveraging reinforcement learning (… that circuit is a graph, we learn on the circuit …
Designer, leveraging reinforcement learning (… that circuit is a graph, we learn on the circuit …
Cure: A high-performance, low-power, and reliable network-on-chip design using reinforcement learning
K Wang, A Louri - IEEE Transactions on Parallel and …, 2020 - ieeexplore.ieee.org
… We reinforce the fault-prone ECC hardware design by proposing a self-diagnosis ECC fault
detector to achieve fault-tolerance in both the communication channels and the ECC circuitry…
detector to achieve fault-tolerance in both the communication channels and the ECC circuitry…
Reinforcement Learning at Design of Electronic Circuits: Review and Analysis
… LEARNING Having outlined the global research achievements in the area of electronic
circuit design and application of RL and deep RL through the bibliographic method, this section …
circuit design and application of RL and deep RL through the bibliographic method, this section …
Optimizing vlsi implementation with reinforcement learning-iccad special session paper
… Reinforcement learning (RL) has gained attention recently as an optimization algorithm for
chip design… solve logic synthesis for structured datapath blocks such as prefix circuits. Several …
chip design… solve logic synthesis for structured datapath blocks such as prefix circuits. Several …
An Efficient Reinforcement Learning Based Framework for Exploring Logic Synthesis
Y Qian, X Zhou, H Zhou, L Wang - ACM Transactions on Design …, 2024 - dl.acm.org
… learning process. This work proposes ESE, a reinforcement learning based framework to
eiciently learn … (ML) open up new opportunities for integrated circuit design methods. Deploying …
eiciently learn … (ML) open up new opportunities for integrated circuit design methods. Deploying …