Full wave simulation of flip-chip packaging effects on RFID transponder

JK Ryoo, JY Choo, IH Park, JK Hong… - 2007 IEEE International …, 2007 - ieeexplore.ieee.org
JK Ryoo, JY Choo, IH Park, JK Hong, J Lee
2007 IEEE International Conference on RFID, 2007ieeexplore.ieee.org
In this paper, we firstly present the full wave simulation model for flip-chip bonding onto a
PET (Polyethylene) substrate. We considered the chip, bumps, electrically conductive
adhesive, substrate, and short conductive trace for antenna. These five elements are
interdependent, and hence it is important to see the full picture in order to design a low cost
transponder and to efficiently produce the transponder. The S-parameter of HFSS simulated
model for physical location of chip onto conductive trace and equivalent RC-circuits for chip …
In this paper, we firstly present the full wave simulation model for flip-chip bonding onto a PET(Polyethylene) substrate. We considered the chip, bumps, electrically conductive adhesive, substrate, and short conductive trace for antenna. These five elements are interdependent, and hence it is important to see the full picture in order to design a low cost transponder and to efficiently produce the transponder. The S-parameter of HFSS simulated model for physical location of chip onto conductive trace and equivalent RC-circuits for chip impedance are used to study the influence of flip-chip bonding on conductive trace, and we calculate the target impedance for transponder design. The results indicate that the bump height and the pattern inside the tag chip significantly effect on the impedance of strap, short conductive trace with flip-chip bonded transponder chip. That means the two parameters must be treated more carefully in RFID transponder production. Focusing on the manufacturing reliable, low-cost RFID transponder, this paper offers an idea in determine the matching impedance for antenna design.
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