The RFID Technology is widely used in many authentications and a sophisticated application, still having many prospective issues includes privacy and security issues. To resolve these issues, this paper presents an efficient Lightweight cryptographic Block cipher algorithm. The hardware architecture of Tiny Encryption Algorithm (TEA) is designed and which is simple, flexible, fewer computations required and simple key scheduling. To overcome the security attacks in key scheduling on TEA, an Extended TEA (XTEA) is designed, which is having pipelined architecture with parallel computation to improve the throughput and provide better security. The proposed XTEA is in reconfigurable nature, by changing the mode to process encryption or decryption. The TEA and XTEA simulation results are obtained from Xilinx ISE tool on ModelSim 6.5f simulator and implemented on FPGA Platform-Artix-7 with resource constraints like Area, time and power are tabulated. The proposed XTEA is compared with similar existing research approaches like AES-8bit, TinyXTEA1, and Tiny XTEA-3 with an improvement of Area, throughput and Efficiency on same FPGA platform. The proposed XTEA works at the high throughput of 81 Mbps and Efficiency of 0.34 Mbps/Slice.