NoPUF: A novel PUF design framework toward modeling attack resistant PUFs

A Wang, W Tan, Y Wen, Y Lao - IEEE Transactions on Circuits …, 2021 - ieeexplore.ieee.org
A Wang, W Tan, Y Wen, Y Lao
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021ieeexplore.ieee.org
With the rapid development and globalization of the semiconductor industry, hardware
security has emerged as a critical concern. New attacking and tampering methods are
continuously challenge current hardware protection methods. Combating these powerful
attacks is of great importance in securing hardware devices. This paper proposes a novel
framework to protect Physical Unclonable Function (PUF) against modeling attacks,
denominated as Noisy PUF (NoPUF). NoPUF exploits structural unpredictability to improve …
With the rapid development and globalization of the semiconductor industry, hardware security has emerged as a critical concern. New attacking and tampering methods are continuously challenge current hardware protection methods. Combating these powerful attacks is of great importance in securing hardware devices. This paper proposes a novel framework to protect Physical Unclonable Function (PUF) against modeling attacks, denominated as Noisy PUF (NoPUF). NoPUF exploits structural unpredictability to improve overall security. We present several PUF architectures under the proposed framework that could reconfigure a conventional reliable PUF to a noisy PUF. The reconfigured PUF becomes inherently unreliable and hence achieves a higher resistance against modeling attacks. Moreover, since only a small portion of the Challenge-Response Pairs (CRPs) are required for authentication, the designer can use the information obtained from the initial reliable PUF configuration to find CRPs, which are still reliable in the noisy PUF configuration for authentication. Exploiting such information asymmetry between designer and attacker is the nexus of the proposed NoPUF design methodology. Experimental results show that we can achieve a maximum attacker and designer accuracy difference of 44.79% for a 64-stage NoPUF candidate architecture while ensuring high reliability for selected challenges.
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