This paper begins by summarizing the goals of the OpenFPGA CoreLib Working Group to
facilitate the interoperability of FPGA circuit cores within a variety of FPGA design tools,
including high-level programming tools targeting FPGA architectures. This effort is
contrasted with other IP reuse efforts. The paper reviews the current approach used by
several high-level language compilers to integrate IP within their tool. The CoreLib approach
for standardizing this IP integration is proposed followed by an example that demonstrates …