Race logic: A hardware acceleration for dynamic programming algorithms
ACM SIGARCH Computer Architecture News, 2014•dl.acm.org
We propose a novel computing approach, dubbed" Race Logic", in which information,
instead of being represented as logic levels, as is done in conventional logic, is represented
as a timing delay. Under this new information representation, computations can be
performed by observing the relative propagation times of signals injected into the circuit (ie
the outcome of races). Race Logic is especially suited for solving problems related to the
instead of being represented as logic levels, as is done in conventional logic, is represented
as a timing delay. Under this new information representation, computations can be
performed by observing the relative propagation times of signals injected into the circuit (ie
the outcome of races). Race Logic is especially suited for solving problems related to the
We propose a novel computing approach, dubbed "Race Logic", in which information, instead of being represented as logic levels, as is done in conventional logic, is represented as a timing delay. Under this new information representation, computations can be performed by observing the relative propagation times of signals injected into the circuit (i.e. the outcome of races). Race Logic is especially suited for solving problems related to the
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