Passivated emitter and rear cell (PERC) solar cells with p-type silicon (Si) substrate have become the mass production factor in the global photovoltaic (PV) market. However, recombination loss at the Si/dielectric interface restricts the performance of the PERC device toward higher efficiency. A local front and back surface doping are utilized to prevent such recombination by creating n/n+ or p/p+ junction in conventional Si solar cells. However, it is hard to achieve a p/p+ based back surface field (BSF) layer using conventional doping methods in PERC solar cell owing to the device architecture. Therefore, in this manuscript, an alternative approach has been discussed to create the p/p+ based BSF in PERC solar cell without altering the device architecture. Here, silicide electrode-based electrostatic doping (ED) is used to induce p+ doping near the back surface in an upright regular pyramid textured-based PERC device. Initially, conventional fully aluminum screen-printed rear electrode-based PERC device is designed and simulated using a process and device simulator to which reflected 25.67% conversion efficiency. Afterward, the concept of ED has been introduced in the conventional PERC device to induce a p+ region at the backside. The silicide electrode with work function (WF) of 5.4 eV (Pd ₂ Si) and 5.2 eV (WSi ₂ ) plays an important role in the formation of p-type doping especially near the Si/dielectric interface at the backside. The performance of the proposed ED-PERC device has been investigated using PV parameters and the current density-voltage (J-V) curve. Results depict that higher conversion efficiency of 26.32% has been achieved with higher WF silicide Pd ₂ Si (5.4 eV) owing to the induced heavily doped p+ region. Optimized PERC device with metal silicide Pd ₂ Si (5.4 eV) delivers short circuit current density (J _SC ) of 41.87 mA/cm ² , open-circuit voltage (V _OC ) of 0.745 V, and fill-factor (FF) of 84.38%. The reported study of silicide ED-based BSF in PERC devices may open a window for further enhancement in PERC device performance.