An analysis of flip-classroom pedagogy in first year undergraduate mathematics for computing

M Bradford, C Muntean, P Pathak - 2014 IEEE Frontiers in …, 2014 - ieeexplore.ieee.org
Mathematics is a key subject for success in Computer Science and it continues to be a
challenging subject. Use of technology has given rise to a new pedagogy called Flip …

Low-power split-radix FFT processors using radix-2 butterfly units

Z Qian, M Margala - IEEE Transactions on Very Large Scale …, 2016 - ieeexplore.ieee.org
Split-radix fast Fourier transform (SRFFT) is an ideal candidate for the implementation of a
low-power FFT processor, because it has the lowest number of arithmetic operations among …

Towards design and automation of a scalable split-radix FFT processor for high throughput applications

A Rauf, MA Pasha, S Masud - Microprocessors and Microsystems, 2019 - Elsevier
Abstract Fast Fourier Transform (FFT) is a rudimentary operation in signal processing.
Modern high speed signal processing and communications standards, such as 4G LTE, 5G …

Design of A High Performance Monobit DFT Based on FPGA and 1-Bit Samplers

P Ji, H Lv, Q Shi, N Yuan - 2020 7th International Conference …, 2020 - ieeexplore.ieee.org
This paper proposes a new method of calculating Discrete Fourier Transform (DFT) for 1-bit
signals sampled by 1-bit samplers based on Field Programmable Gate Array (FPGA), which …

Dynamic Twiddle Factors Split-Radix Fast Fourier Transform for Monobit Receivers

P Ji, Q Shi, N Yuan - 2020 IEEE International Conference on …, 2020 - ieeexplore.ieee.org
This paper gives a new method to replace the discrete Fourier transform (DFT) for monobit
receivers by using dynamic twiddle factors based on the split-radix fast Fourier transform …

Two‐band fast Hartley transform

AN Skodras, MF Aburdene, AK Nandi - Electronics Letters, 2015 - Wiley Online Library
Efficient algorithms have been developed over the past 30 years for computing the forward
and inverse discrete Hartley transforms (DHTs). These are similar to the fast Fourier …

A memory-based FFT processor using modified signal flow graph with novel conflict-free address schemes

Y Tian, Y Hei, Z Liu, Z Di, Q Shen, Z Yu - IEICE Electronics Express, 2017 - jstage.jst.go.jp
In this brief, we propose a novel method which realizes conflictfree strategy in memory-
based FFT, of which the hardware complexity is simplified, since only a few extra registers …

Datapath-regular implementation and scaled technique for N= 3× 2m DFTs

W Zheng, K Li, K Li - Signal Processing, 2015 - Elsevier
Discrete Fourier transform (DFT) is used widely in almost all fields of science and
engineering, and is generally calculated using the fast Fourier transform (FFT) algorithm. In …

2-D Systolic Array architecture of CBNS based Discrete Hilbert Transform Processor

M Mukherjee, SK Sanyal - Microprocessors and Microsystems, 2021 - Elsevier
This paper proposes an optimized design of Discrete Hilbert Transform (DHT) processor
using Complex Binary Number System (CBNS). The conventional implementation of DHT …

NoC Based Multiplier-Less Constant Geometry FFT Architecture

N Prasad, I Chakrabarti… - … Conference of Emerging …, 2014 - ieeexplore.ieee.org
This paper reports the architecture of a Network-on-Chip (NoC) based constant geometry
FFT (CGFFT). The twiddle factor complex multiplications have been realized using new …