Ascon v1.2: Lightweight Authenticated Encryption and Hashing

C Dobraunig, M Eichlseder, F Mendel, M Schläffer - Journal of Cryptology, 2021 - Springer
Authenticated encryption satisfies the basic need for authenticity and confidentiality in our
information infrastructure. In this paper, we provide the specification of Ascon-128 and …

Hardware private circuits: From trivial composition to full verification

G Cassiers, B Grégoire, I Levi… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
The design of glitch-resistant higher-order masking schemes is an important challenge in
cryptographic engineering. A recent work by Moos et al.(CHES 2019) showed that most …

SILVER–statistical independence and leakage verification

D Knichel, P Sasdrich, A Moradi - … on the Theory and Application of …, 2020 - Springer
Implementing cryptographic functions securely in the presence of physical adversaries is still
a challenge although a lion's share of research in the physical security domain has been put …

Glitch-resistant masking revisited: Or why proofs in the robust probing model are needed

T Moos, A Moradi, T Schneider… - IACR Transactions on …, 2019 - tches.iacr.org
Implementing the masking countermeasure in hardware is a delicate task. Various solutions
have been proposed for this purpose over the last years: we focus on Threshold …

PROLEAD: A probing-based hardware leakage detection tool

N Müller, A Moradi - IACR Transactions on Cryptographic Hardware …, 2022 - tches.iacr.org
Abstract Even today, Side-Channel Analysis attacks pose a serious threat to the security of
cryptographic implementations fabricated with low-power and nanoscale feature …

Real-world snapshots vs. theory: Questioning the t-probing security model

T Krachenfels, F Ganji, A Moradi… - … IEEE symposium on …, 2021 - ieeexplore.ieee.org
Due to its sound theoretical basis and practical efficiency, masking has become the most
prominent countermeasure to protect cryptographic implementations against physical side …

Automated generation of masked hardware

D Knichel, A Moradi, N Müller, P Sasdrich - Cryptology ePrint Archive, 2021 - eprint.iacr.org
Masking has been recognized as a sound and secure countermeasure for cryptographic
implementations, protecting against physical side-channel attacks. Even though many …

Low-latency hardware private circuits

D Knichel, A Moradi - Proceedings of the 2022 ACM SIGSAC …, 2022 - dl.acm.org
Over the last years, the rise of the IoT, and the connection of mobile-and hence physically
accessible-devices, immensely enhanced the demand for fast and secure hardware …

Modulonet: Neural networks meet modular arithmetic for efficient hardware masking

A Dubey, A Ahmad, MA Pasha… - IACR Transactions on …, 2022 - tches.iacr.org
Intellectual Property (IP) thefts of trained machine learning (ML) models through side-
channel attacks on inference engines are becoming a major threat. Indeed, several recent …

Generic low-latency masking in hardware

H Groß, R Iusupov, R Bloem - IACR transactions on cryptographic …, 2018 - tches.iacr.org
In this work, we introduce a generalized concept for low-latency masking that is applicable to
any implementation and protection order, and (in its most extreme form) does not require on …