Recent advances and trends in advanced packaging

JH Lau - IEEE Transactions on Components, Packaging and …, 2022 - ieeexplore.ieee.org
In this study, advanced packaging is defined. The kinds of advanced packaging are ranked
based on their interconnect density and electrical performance, and are grouped into 2-D …

[图书][B] Advanced packaging

JH Lau, JH Lau - 2021 - Springer
First of all, semiconductor technology is out of the scope of this book and semiconductor
advanced packaging technology is the focus. In this chapter, the advanced packaging will …

Hybrid substrate by fan-out RDL-first panel-level packaging

JH Lau, GCF Chen, JYC Huang… - IEEE Transactions …, 2021 - ieeexplore.ieee.org
The panel-level redistribution-layer (RDL)-first fan-out packaging for hybrid substrate is
studied. Emphasis is placed on the process, materials, design, and fabrication of: 1) …

Comparison of mechanical modeling to warpage estimation of RDL-first fan-out panel-level packaging

CC Lee, CW Wang, CY Chen - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
To meet the requirements of low cost, thin vehicles, and multiple functions, the fan-out panel-
level packaging (FO-PLP) is introduced to be one of the next-generation packaging …

A review on warpage measurement metrologies for advanced electronic packaging

G Sun, S Zhang - Microelectronics Reliability, 2024 - Elsevier
In the post-Moore era, advanced electronic packaging technology emerges as a prominent
direction for the future evolution of semiconductor industry. Nevertheless, warpage remains …

Fan-out (RDL-first) panel-level hybrid substrate for heterogeneous integration

JH Lau, GCF Chen, JYC Huang… - 2021 IEEE 71st …, 2021 - ieeexplore.ieee.org
The fan-out panel-level chip-last packaging for heterogeneous integration is investigated.
Emphasis is placed on the design, materials, process, and fabrication of:(a) the …

Chip-last (RDL-first) fan-out panel-level packaging (FOPLP) for heterogeneous integration

JH Lau, CT Ko, CY Peng, KM Yang… - Journal of …, 2020 - meridian.allenpress.com
In this investigation, the chip-last, redistribution-layer (RDL)–first, fan-out panel-level
packaging (FOPLP) for heterogeneous integration is studied. Emphasis is placed on the …

Chiplet Heterogeneous Integration

JH Lau - Semiconductor Advanced Packaging, 2021 - Springer
Recently, heterogeneous integration of chiplets (chiplet heterogeneous integration or
heterogeneous chiplet integration) is getting lots of tractions [,,,,,,,,,,,,,,,,–]. Microprocessors …

State-of-the-art and outlooks of chiplets heterogeneous integration and hybrid bonding

JH Lau - Journal of Microelectronics and Electronic …, 2021 - meridian.allenpress.com
In this study, the recent advances and trends of chip-let design and heterogeneous
integration packaging will be investigated. Emphasis is placed on the definition, kinds …

Fabrication and high-frequency characterization of low-cost fan-in/out WLP technology with RDL for 2.5 D/3D heterogeneous integration

J Xu, Y Sun, J Liu, YD Wei, WS Zhao, DW Wang - Microelectronics Journal, 2022 - Elsevier
Redistribution layer (RDL) and through silicon via (TSV) are the two main important
packaging methods of the heterogeneous integration, here we report on the interconnection …