Approximate computing survey, Part II: Application-specific & architectural approximation techniques and applications

V Leon, MA Hanif, G Armeniakos, X Jiao… - arXiv preprint arXiv …, 2023 - arxiv.org
The challenging deployment of compute-intensive applications from domains such Artificial
Intelligence (AI) and Digital Signal Processing (DSP), forces the community of computing …

PSO Optimized Design of Error Balanced Weight Stationary Systolic Array Architecture for CNN

DN Devi, GA Kumar, BG Gowda… - 2024 25th International …, 2024 - ieeexplore.ieee.org
The utilization of hardware-designed approximate computing in Convolutional Neural
Networks (CNNs) offers notable advantages, including accelerated performance, enhanced …

OEDASA: Optimization Enabled Error-Diluted Approximate Systolic Array Design for an Image Processing Application

DN Devi, GA Kumar, BG Gowda… - 2024 37th International …, 2024 - ieeexplore.ieee.org
Systolic Array (SA) architecture is a hardware accelerator for running Artificial Intelligence
(AI) workloads. Although approximate computing offers hardware and performance benefits …

Performance-Aware Design of Approximate Integrated MAC Factored Systolic Array Accelerators

DN Devi, GA Kumar, BG Gowda… - 2024 25th International …, 2024 - ieeexplore.ieee.org
Approximate Computing has gained traction owing to its compounded benefits achieved in
hardware design parameters, without disturbing the overall outcome inferred from the error …

[引用][C] Approximate Computing: Hardware and Software Techniques, Tools and Their Applications

M Raza, S Javed, M Kazmi, A Aziz… - Journal of Circuits …, 2024 - World Scientific
The limitations of scaling in CMOS technology pose challenges in meeting the requirements
of future applications. To address these challenges, researchers are exploring various …