A high-speed low-complexity modified radix-2 5 FFT processor for gigabit WPAN applications

[引用][C] 광대역디지털수신기용채널화기의FPGA 구현을위한FFT 상위레벨시뮬레이터구현및성능분석

나하나， 조태상， 송장훈， 주형준， 강종진 - 대한전자공학회학술대회, 2017 - dbpia.co.kr
This paper presents optimal bitwidth combination of FFT core for channelizer of broadband
digital receiver by analyzing SQNR (signal-to-quatization noise ratio) performance. Poly …
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