Layered semiconducting 2D materials for future transistor applications
SK Su, CP Chuu, MY Li, CC Cheng… - Small …, 2021 - Wiley Online Library
Down‐scaling of transistor size in the lateral dimensions must be accompanied by a
corresponding reduction in the channel thickness to ensure sufficient gate control to turn off …
corresponding reduction in the channel thickness to ensure sufficient gate control to turn off …
Layered Semiconducting 2D Materials for Future Transistor Applications
SK Su, CP Chuu, MY Li, CC Cheng, HSP Wong, LJ Li - Small Structures, 2021 - cir.nii.ac.jp
抄録< jats: sec>< jats: label/>< jats: p> Down‐scaling of transistor size in the lateral
dimensions must be accompanied by a corresponding reduction in the channel thickness to …
dimensions must be accompanied by a corresponding reduction in the channel thickness to …
[PDF][PDF] Layered Semiconducting 2D Materials for Future Transistor Applications
SK Su, CP Chuu, MY Li, CC Cheng, HSP Wong, LJ Li - researchgate.net
Twenty-first century abundant-data computing such as big-data analytics, artificial
intelligence (AI) and Internet of Things (IoT) demand extreme energy efficiency and …
intelligence (AI) and Internet of Things (IoT) demand extreme energy efficiency and …
[PDF][PDF] Layered Semiconducting 2D Materials for Future Transistor Applications
SK Su, CP Chuu, MY Li, CC Cheng, HSP Wong, LJ Li - researchgate.net
Twenty-first century abundant-data computing such as big-data analytics, artificial
intelligence (AI) and Internet of Things (IoT) demand extreme energy efficiency and …
intelligence (AI) and Internet of Things (IoT) demand extreme energy efficiency and …