With fabrication technology reaching nanolevels, systems are becoming more prone to
manufacturing defects with higher susceptibility to soft errors. This paper is focused on …

Nano-scale devices are continuously shrinking, operating at lower voltages and higher
frequencies. This makes them more susceptible to environmental perturbations and …

Nanotechnology-based fabrication is expected to offer the extra density and potential
performance to take electronic circuits beyond the scaling limits reached by CMOS …

This article aims to present a survey of important software based (or software controlled)
fault tolerance literature over the period of 1966 to 2006. Nowadays, fault tolerance is a …

Due to current technology scaling trends, digital designs are becoming more sensitive to
radiation-induced particle hits resulting from radioactivity decay and cosmic rays. A low …

Advances in CMOS technology have made digital circuits and systems very sensitive to
manufacturing variations, aging, and/or soft errors. Fault-tolerant techniques using hardware …

The reliability of integrated circuits has become an unavoidable subject in the nanoscale
era. The susceptibility of combinational logic circuits to faults is of increasing interest, and …

This paper presents an overview of the Built-In Soft Error Resilience (BISER) technique for
correcting soft errors in latches, flip-flops and combinational logic. The BISER technique …

This paper presents some aspects of fault-tolerant design using hardware redundancy. The
voter is the key element in N-modular redundant design. Hardware voters are bit voters that …

Today's mainstream electronic systems typically assume that transistors and interconnects
operate correctly over their useful lifetime. With enormous complexity and significantly …