Oscillation built-in self test (OBIST) scheme for functional and structural testing of analog and mixed-signal integrated circuits

K Arabi, B Kaminska - Proceedings International Test …, 1997 - ieeexplore.ieee.org
This paper describes a new built-in self test (BIST) technique suitable for both functional and
structural testing of analog and mixed-signal circuits based on the oscillation-test …

Efficient and accurate testing of analog-to-digital converters using oscillation-test method

K Arabi, B Kaminska - … Design and Test Conference. ED & TC …, 1997 - ieeexplore.ieee.org
This paper describes a practical test approach for analog-to-digital converters (ADCs) based
on the oscillation-test strategy. The oscillation-test is applied to convert the ADC under test to …

Oscillation-test strategy for analog and mixed-signal integrated circuits

K Arabi, B Kaminska - Proceedings of 14th VLSI Test …, 1996 - ieeexplore.ieee.org
A new low-cost test method for analog integrated circuits, called oscillation-test, is
presented. During the test mode, the circuit under test (CUT) is converted to a circuit that …

A BIST technique for a frequency response and intermodulation distortion test of a sigma-delta ADC

MF Toner, GW Roberts - Proceedings of IEEE VLSI Test …, 1994 - ieeexplore.ieee.org
Built-in-self-test (BIST) for VLSI systems is desirable for production-time testing and in the
field diagnostics. This paper discusses a Mixed Analog Digital BIST (MADBIST) for a …

A BIST scheme for an SNR test of a sigma-delta ADC

MF Toner, GW Roberts - Proceedings of IEEE International Test …, 1993 - ieeexplore.ieee.org
Built-In-Self-Test (BIST) for VLSI systems is desirable in order to reduce the cost per chip of
production-time testing by the manufacturer. In addition, it can provide the means to perform …

Built-in self-test methodology for A/D converters

R De Vries, T Zwemstra, E Bruls… - … European Design and …, 1997 - ieeexplore.ieee.org
A (partial) Built-in Self-Test (BIST) methodology is proposed for analog to digital (A/D)
converters. In this methodology the number of bits of the A/D converter that needs to be …

An ADC-BiST scheme using sequential code analysis

ES Erdogan, S Ozev - 2007 Design, Automation & Test in …, 2007 - ieeexplore.ieee.org
This paper presents a built-in self-test (BiST) scheme for analog to digital converters (ADC)
based on a linear ramp generator and efficient output analysis. The proposed analysis …

Parametric and catastrophic fault coverage of analog circuits in oscillation-test methodology

K Arabi, B Kaminska - … . 15th IEEE VLSI Test Symposium (Cat …, 1997 - ieeexplore.ieee.org
This paper investigates parametric and catastrophic fault coverage of the oscillation-test
strategy. A set of definitions to evaluate the efficiency of a test technique and to quantify the …

An on chip ADC test structure

YC Wen, KJ Lee - Proceedings of the conference on Design, automation …, 2000 - dl.acm.org
In this paper, a new built-in self-test structure to test the static specifications of analog to
digital converters (ADCs) is presented. A ramp signal generated by an integrator serves as a …

A comprehensive signature analysis scheme for oscillation-test

J Roh, JA Abraham - … on Computer-Aided Design of Integrated …, 2003 - ieeexplore.ieee.org
A low-cost and comprehensive built-in self-test (BIST) methodology for analog and mixed-
signal circuits is described. We implement a time-division multiplexing (TDM) comparator to …