The co fabrication of SET & CMOS technology has already proved its ability to bring a drastic
change in the era of nanodimensional devices. In our present work a well known …

Hybridization between CMOS logic and single electron transistor has already revolutionized
our present nano technological aspects. Ultra low power consumption as well as ultra dense …

Continuous downscaling in MOSFET channel length for achieving highly dense IC has led
the researchers to face some performance related issues due to short channel effects …

In present research areas of VLSI design & Microelectronics technology, Single Electron
Transistor is in a place of attraction for the researchers due to, ultralow power dissipation …

Traditional method of device designing is getting replaced by emerging trend of hybrid SET-
CMOS logic. Mutual integration between the two has led towards ultra-dense circuitry as …

ABSTRACT Single Electron Transistor (SET) is an advanced technology for future low power
VLSI devices. SET has high integration density and a low power consumption device. While …

Single electron semiconductor device is a 3 terminal Nano-electronic device which might
offers low power consumption with high operative speed. SET can retain its scalability and …

This paper attempts to compare ternary and binary logic gate design using CMOS and
carbon nanotube (CNT)-FETs technology. Ternary logic is an effective approach over the …

Single electron devices have extremely poor driving capabilities so that direct application to
practical circuits is as yet almost impossible. A new methodology to overcome this problem …

Single electron transistor is a nanoelectronic three terminal device. It provides current
conduction characteristics comparable to a MOSFET. In this paper, the authors have …