128-channel high-linearity resolution-adjustable time-to-digital converters for LiDAR applications: Software predictions and hardware implementations

W Xie, Y Wang, H Chen, DDU Li - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
This article proposes a new calibration method, called the mixed-binning (MB) method, to
pursue high-linearity time-to-digital converters (TDCs) for light detection and ranging …

A low-power multichannel time-to-digital converter using all-digital nested delay-locked loops with 50-ps resolution and high throughput for LiDAR sensors

A Hejazi, SJ Oh, MRU Rehman, RE Rad… - IEEE Transactions …, 2020 - ieeexplore.ieee.org
This article presents a low-power, all-digital multichannel time-to-digital converter (TDC) for
light detection and ranging (LiDAR) sensors. The proposed TDC architecture measures the …

A novel time-to-amplitude converter and a low-cost wide dynamic range FPGA TDC for LiDAR application

AO Korkan, H Yuksel - IEEE Transactions on Instrumentation …, 2022 - ieeexplore.ieee.org
This article demonstrates a low-cost wide dynamic range field-programmable gate array
(FPGA) time-to-digital converter (TDC) and a time-to-amplitude converter (TAC) based on an …

256 TDC Array With Cyclic Interpolators Based on Calibration-Free Time Amplifier

P Keränen, J Kostamovaara - IEEE Transactions on Circuits …, 2018 - ieeexplore.ieee.org
This paper presents the design of a CMOS time-to-digital converter (TDC) used in a direct
time-of-flight laser radar line receiver consisting of an array of single-photon avalanche …

A 50-ps gated VCRO-based TDC with compact phase interpolators for flash LiDAR

J Hu, X Wang, D Li, Y Liu, R Ma… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
This article describes a small footprint, low power gated voltage-controlled ring oscillator
(VCRO)-based Time-To-Digital converter (TDC) for Flash Light Detection and Ranging …

Multi-channel FPGA time-to-digital converter with 10 ps bin and 40 ps FWHM

D Portaluppi, K Pasquinelli, I Cusini… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
We present a novel architecture for multi-channel time-to-digital converters (TDCs) to be
implemented into low-cost field-programmable gate arrays (FPGAs), achieving 10-ps least …

A tunable parameter, high linearity time-to-digital converter implemented in 28-nm FPGA

J Deng, P Yin, X Lei, Z Shu, M Tang… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
This article presents a high linearity time-to-digital converter (TDC) with tunable parameters,
based on a field-programmable gate array (FPGA) device. Specifically, a nonuniform …

Time-to-digital converter using a tuned-delay line evaluated in 28-, 40-, and 45-nm FPGAs

JY Won, JS Lee - IEEE Transactions on Instrumentation and …, 2016 - ieeexplore.ieee.org
This paper proposes a bin-width tuning method for a field-programmable gate array (FPGA)-
based delay line for a time-to-digital converter (TDC). Changing the hit transitions and …

A fine time-resolution (≪ 3 ps-rms) time-to-digital converter for highly integrated designs

L Perktold, J Christiansen - 2013 IEEE International …, 2013 - ieeexplore.ieee.org
A multi-channel 3-ps-rms single-shot precision timeto-digital converter (TDC) is presented.
The time interpolation is based on a delay-locked-loop (DLL) employing resistive …

7.2 A 48× 40 13.5 mm depth resolution flash LiDAR sensor with in-pixel zoom histogramming time-to-digital converter

B Kim, S Park, JH Chun, J Choi… - 2021 IEEE International …, 2021 - ieeexplore.ieee.org
3D imaging technologies have become prevalent for diverse applications such as user
identification, interactive user interfaces with AR/VR devices, and self-driving cars. Direct …