A defect-tolerant computer architecture: Opportunities for nanotechnology
JR Heath, PJ Kuekes, GS Snider, RS Williams - Science, 1998 - science.org
Teramac is a massively parallel experimental computer built at Hewlett-Packard
Laboratories to investigate a wide range of different computational architectures. This …
Laboratories to investigate a wide range of different computational architectures. This …
Defect tolerance in VLSI circuits: techniques and yield analysis
I Koren, Z Koren - Proceedings of the IEEE, 1998 - ieeexplore.ieee.org
Current very-large-scale-integration (VLSI) technology allows the manufacture of large-area
integrated circuits with submicrometer feature sizes, enabling designs with several millions …
integrated circuits with submicrometer feature sizes, enabling designs with several millions …
[图书][B] Digital microfluidic biochips: synthesis, testing, and reconfiguration techniques
K Chakrabarty, F Su - 2018 - taylorfrancis.com
Digital Microfluidic Biochips focuses on the automated design and production of microfluidic-
based biochips for large-scale bioassays and safety-critical applications. Bridging areas of …
based biochips for large-scale bioassays and safety-critical applications. Bridging areas of …
Low overhead fault-tolerant FPGA systems
J Lach, WH Mangione-Smith… - IEEE Transactions on …, 1998 - ieeexplore.ieee.org
Fault-tolerance is an important system metric for many operating environments, from
automotive to space exploration. The conventional technique for improving system reliability …
automotive to space exploration. The conventional technique for improving system reliability …
Oscillation built-in self test (OBIST) scheme for functional and structural testing of analog and mixed-signal integrated circuits
K Arabi, B Kaminska - Proceedings International Test …, 1997 - ieeexplore.ieee.org
This paper describes a new built-in self test (BIST) technique suitable for both functional and
structural testing of analog and mixed-signal circuits based on the oscillation-test …
structural testing of analog and mixed-signal circuits based on the oscillation-test …
A survey of fault tolerant methodologies for FPGAs
JA Cheatham, JM Emmert, S Baumgart - ACM Transactions on Design …, 2006 - dl.acm.org
A wide range of fault tolerance methods for FPGAs have been proposed. Approaches range
from simple architectural redundancy to fully on-line adaptive implementations. The …
from simple architectural redundancy to fully on-line adaptive implementations. The …
Dynamic fault tolerance in FPGAs via partial reconfiguration
J Emmert, C Stroud, B Skaggs… - Proceedings 2000 IEEE …, 2000 - ieeexplore.ieee.org
In this paper we present an on-line, multi-level fault tolerant (FT) technique for system
functions and applications mapped to partially and dynamically reconfigurable FPGAs. Our …
functions and applications mapped to partially and dynamically reconfigurable FPGAs. Our …
Fault tolerant methods for reliability in FPGAs
E Stott, P Sedcole, PYK Cheung - … International Conference on …, 2008 - ieeexplore.ieee.org
Reliability and process variability are serious issues for FPGAs in the future. Fortunately
FPGAs have the ability to reconfigure in the field and at runtime, thus providing opportunities …
FPGAs have the ability to reconfigure in the field and at runtime, thus providing opportunities …
Defect tolerance on the teramac custom computer
WB Culbertson, R Amerson, RJ Carter… - … . The 5th Annual …, 1997 - ieeexplore.ieee.org
Teramac is a large custom computer which works correctly despite the fact that three
quarters of its FPGAs contain defects. This is accomplished through unprecedented use of …
quarters of its FPGAs contain defects. This is accomplished through unprecedented use of …
Methodologies for tolerating cell and interconnect faults in FPGAs
F Hanchek, S Dutt - IEEE Transactions on Computers, 1998 - ieeexplore.ieee.org
The very high levels of integration and submicron device sizes used in current and emerging
VLSI technologies for FPGAs lead to higher occurrences of defects and operational faults …
VLSI technologies for FPGAs lead to higher occurrences of defects and operational faults …